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* google/veyron_rialto: Reduce voltage and frequency in recovery modeDavid Hendricks2015-10-251-0/+8
| | | | | | | | | | | | | | | | | | | | This applies CL:300617 to Rialto to down throttle further in recovery mode. BUG=chrome-os-partner:42054 BRANCH=none TEST=Saw print statment in recovery mode with image.serial.bin, device only got mildly warm after several minutes (not hot). Change-Id: I08b6024d31c83c6bbd8c8d9d9a07adc9835e81fd Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 74eb9143fbe13df5f386185eab9e5ba9df27cadf Original-Signed-off-by: David Hendricks <dhendrix@chromium.org> Original-Change-Id: I9e57d826750cb523c115332fa13a6143bcff7449 Original-Reviewed-on: https://chromium-review.googlesource.com/302631 Reviewed-on: http://review.coreboot.org/12135 Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks <dhendrix@chromium.org>
* veyron_rialto: remove spurious GPIO assignmentsAlexandru M Stan2015-08-281-3/+1
| | | | | | | | | | | | | | | | | | | | GPIO(0, B, 3) and GPIO(7, C, 5) are not actually connected, GPIO(0, B, 4) is named differently. BUG=chrome-os-partner:43031 TEST=Rialto should still boot just fine, USB should still work BRANCH=master Change-Id: I11879385de6e9b57ac28bcae699333beb5a0d64c Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Original-Commit-Id: a66bf1fd73ff8d15d4ec1a8f3602465941285c32 Original-Change-Id: Ib7d2baa6ed1ab38db786eb4d5e77316ad72cbfd4 Original-Signed-off-by: Alexandru M Stan <amstan@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/294713 Original-Reviewed-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/11400 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
* veyron_rialto: Force 3G modem offDavid Hendricks2015-08-281-0/+9
| | | | | | | | | | | | | | | | | | | | | This basically does the same thing for firmware what CL:290631 did in the kernel. We want to keep the modem off until it needs to be used to avoid enumeration/detection issues. BUG=chrome-os-partner:43271 BRANCH=none TEST=needs testing Change-Id: I3b63a77c732dc4895b728b30f1dd71210a9c0e90 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Original-Commit-Id: a90ccd7fbffe44abe05e96341cc77067442c85e4 Original-Change-Id: I3516de1ea9160f7186ad7f5fb3b5d29ac73143b5 Original-Signed-off-by: David Hendricks <dhendrix@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/290890 Original-Reviewed-by: Alexandru Stan <amstan@chromium.org> Reviewed-on: http://review.coreboot.org/11385 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
* veyron_rialto: Use VOP_MODE_NONE for display init.David Hendricks2015-07-061-0/+1
| | | | | | | | | | | | | | | | | | | | This uses VOP_MODE_NONE for display init on veyron_rialto and adds a mainboard_power_on_backlight() stub so that we can finally get rid of SKIP_DISPLAY_INIT_HACK. BUG=none BRANCH=none TEST=built for veyron_rialto Change-Id: Ia6b420a962fe266e773c804b8e5c68da35848753 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: a290c938c163759a3672c07d8ec7c0a38057b13d Original-Change-Id: Iec2d7f03857198a4d6f7490db1e3e19c74f18c43 Original-Signed-off-by: David Hendricks <dhendrix@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/282048 Reviewed-on: http://review.coreboot.org/10784 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
* Remove address from GPLv2 headersPatrick Georgi2015-05-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As per discussion with lawyers[tm], it's not a good idea to shorten the license header too much - not for legal reasons but because there are tools that look for them, and giving them a standard pattern simplifies things. However, we got confirmation that we don't have to update every file ever added to coreboot whenever the FSF gets a new lease, but can drop the address instead. util/kconfig is excluded because that's imported code that we may want to synchronize every now and then. $ find * -type f -exec sed -i "s:Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, *MA[, ]*02110-1301[, ]*USA:Foundation, Inc.:" {} + $ find * -type f -exec sed -i "s:Foundation, Inc., 51 Franklin Street, Suite 500, Boston, MA 02110-1335, USA:Foundation, Inc.:" {} + $ find * -type f -exec sed -i "s:Foundation, Inc., 59 Temple Place[-, ]*Suite 330, Boston, MA *02111-1307[, ]*USA:Foundation, Inc.:" {} + $ find * -type f -exec sed -i "s:Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.:Foundation, Inc.:" {} + $ find * -type f -a \! -name \*.patch \ -a \! -name \*_shipped \ -a \! -name LICENSE_GPL \ -a \! -name LGPL.txt \ -a \! -name COPYING \ -a \! -name DISCLAIMER \ -exec sed -i "/Foundation, Inc./ N;s:Foundation, Inc.* USA\.* *:Foundation, Inc. :;s:Foundation, Inc. $:Foundation, Inc.:" {} + Change-Id: Icc968a5a5f3a5df8d32b940f9cdb35350654bef9 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/9233 Tested-by: build bot (Jenkins) Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
* arm(64): Globally replace writel(v, a) with write32(a, v)Julius Werner2015-04-211-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is a raw application of the following spatch to src/: @@ expression A, V; @@ - writel(V, A) + write32(A, V) @@ expression A, V; @@ - writew(V, A) + write16(A, V) @@ expression A, V; @@ - writeb(V, A) + write8(A, V) @@ expression A; @@ - readl(A) + read32(A) @@ expression A; @@ - readb(A) + read8(A) BRANCH=none BUG=chromium:444723 TEST=None (depends on next patch) Change-Id: I5dd96490c85ee2bcbc669f08bc6fff0ecc0f9e27 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 64f643da95d85954c4d4ea91c34a5c69b9b08eb6 Original-Change-Id: I366a2eb5b3a0df2279ebcce572fe814894791c42 Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/254864 Reviewed-on: http://review.coreboot.org/9836 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
* veyron_{brain,danger,rialto}: Enable eventloggingDavid Hendricks2015-04-171-0/+6
| | | | | | | | | | | | | | | | | | | | This brings brain, danger, and rialto up to parity with other veyron platforms as far as eventlog functionality is concerned. BUG=chrome-os-partner:34436 BRANCH=none TEST="mosys eventlog list" shows events (tested on Brain) Change-Id: I186c5d18e5351c0eaf08ffecfd87506283c44b19 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 1764bc53147718031231a6d125a4a1a96c4c6a8f Original-Signed-off-by: David Hendricks <dhendrix@chromium.org> Original-Change-Id: Ief09299965f6f21bc5a40cef31cde61344025c2a Original-Reviewed-on: https://chromium-review.googlesource.com/239979 Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-on: http://review.coreboot.org/9755 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
* veyron: Add veyron_rialto boardjinkun.hong2015-04-151-0/+105
Derived from of veyron_brain with new memory configuration. BUG=chrome-os-partner:35072 TEST=built and boot on rialto-rev0 boards. BRANCH=veyron Change-Id: I2c6f74d231e39de76ef2399fdb20efae977b34fa Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Original-Commit-Id: 17d66e5f58562427badd6973ebb053f58573c040 Original-Change-Id: I8626ff5da8098ca120481b8cda0c6703f806711e Original-Signed-off-by: jinkun.hong <jinkun.hong@rock-chips.com> Original-Signed-off-by: Hung-Te Lin <hungte@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/238946 Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Original-Trybot-Ready: Julius Werner <jwerner@chromium.org> Reviewed-on: http://review.coreboot.org/9649 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-09-22 01:14:37 +0000