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path: root/src/mainboard/intel
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* mb/intel/adlrvp_m: Disable Type-C xDCIBernardo Perez Priego2021-05-061-1/+1
* mb/intel/adlrvp: Enable support for Chrome OS mode switchesAnil Kumar2021-05-051-0/+2
* nb/intel: Don't select VBOOT_SEPARATE_VERSTAGEArthur Heymans2021-05-051-1/+1
* mb/intel/shadowmountain: Enable early EC Software SyncUsha P2021-05-051-1/+1
* mb/intel/adlrvp: Increase RO/RW region size in chromeos.fmdMaulik V Vaghela2021-05-031-32/+38
* mb/intel/adlrvp: Configure TCSS, BT and WiFi related GPIOsFrancois Toguo2021-04-291-0/+57
* mb/intel/adlrvp_m: Add UART0 GPIO config for ADL-M RVPAnil Kumar2021-04-281-0/+10
* mb/intel/shadowmountain: Enable HECI1 interfaceSridhar Siricilla2021-04-231-1/+1
* mb/intel/shadowmountain: Enable RTD3 for SD cardRizwan Qureshi2021-04-231-1/+7
* mb/intel/adlrvp: Enable DPTF functionality for adlrvp boardSumeet R Pawnikar2021-04-232-1/+102
* mb/intel/adlrvp_m: Enable bluetoothBora Guvendik2021-04-231-1/+3
* soc/intel/alderlake: Add enum for HDA audio configurationSugnan Prabhu S2021-04-223-18/+9
* soc/intel/alderlake and mb: Drop PchHdaAudioLink*Enable UPDs from chip.hFurquan Shaikh2021-04-223-17/+0
* soc/intel/alderlake: Drop unused `PrmrrSize` from devicetreeAngel Pons2021-04-213-5/+0
* mb/intel/shadowmountain: Disable GSPI1 interface connected to FPSSridhar Siricilla2021-04-212-10/+2
* mb/intel/adlrvp: Enable ALC711 over SNDW0Sridhar Siricilla2021-04-161-0/+27
* dptf: Move platform-specific information to `struct dptf_platform_info`Tim Wawrzynczak2021-04-131-1/+0
* mb/*: drop LPC generic range for port 80Michael Niewöhner2021-04-122-2/+0
* mb/intel/shadowmountain: Enable Bluetooth config in the devicetreeSridhar Siricilla2021-04-101-1/+4
* mb/intel/adlrvp: Enable HECI1 communicationSridhar Siricilla2021-04-091-0/+3
* mb/{google/jecht,intel/wtm2}: Remove NOOP APM finalize callArthur Heymans2021-04-091-8/+0
* mb/intel/adlrvp: Update iDisp Link UPD settingsFrancois Toguo2021-04-061-1/+1
* mb/intel/adlrvp: Enable Camera in ADL-M RVPVarshit Pandya2021-04-061-2/+14
* mb/intel/shadowmountain: Add Cr50 supportAamir Bohra2021-04-062-2/+17
* mb/intel/adlrvp: Update VBT filenamesTim Wawrzynczak2021-04-021-2/+2
* mb/intel/adlrvp_m: Enable ADL-M RVP LP5 memory configurationMaulik V Vaghela2021-03-285-1/+97
* mb/intel/adlrvp_m: Enable ADL_M RVP LP4 memory configurationMaulik V Vaghela2021-03-285-8/+101
* mb/intel/adlrvp: Configure GPIOs for ADLRVP-MVarshit Pandya2021-03-283-1/+105
* mb/intel/shadowwmountain: Enable CSE Lite SKU for shadowmountainSridhar Siricilla2021-03-281-0/+1
* mb/intel/adlrvp: Enable CSE Lite SKUSridhar Siricilla2021-03-281-0/+1
* mb/intel/dcp847ske: Drop useless MCHBAR writesAngel Pons2021-03-271-8/+0
* mb/intel/adlrvp: Allow GPIO PM override to disable dynamic GPIO PMSubrata Banik2021-03-271-0/+10
* mb/intel/shadowmountain: Disable the unused CPU PCIe RPV Sowmya2021-03-261-1/+1
* mb/intel/adlrvp: Remove static VBT stitchingMaulik V Vaghela2021-03-261-5/+0
* soc/intel/alderlake: Add provision to override Rcomp settingsSubrata Banik2021-03-261-13/+16
* soc/intel/alderlake: Align RcompResistor definition as per MRCSubrata Banik2021-03-261-4/+4
* nb/intel/haswell: Decouple mainboard USB config from MRCAngel Pons2021-03-251-2/+2
* mb/intel/adlrvp: Enable CnviBtAudioOffloadUsha P2021-03-241-0/+2
* nb/intel/haswell: Use unshifted SPD addresses in mainboardsAngel Pons2021-03-231-4/+4
* lynxpoint/broadwell: Rename LP GPIO config globalAngel Pons2021-03-221-1/+1
* mainboard/: Register chipset_lockdown on xeon_sp mainboardsMarc Jones2021-03-201-0/+5
* nb/intel/haswell: Consolidate memory-down SPD handlingAngel Pons2021-03-191-5/+5
* spd_bin: Replace get_spd_cbfs_rdev() with spd_cbfs_map()Julius Werner2021-03-172-13/+8
* mb/intel/shadowmountain: Update HDMI audio mode to 8TSugnan Prabhu S2021-03-171-1/+1
* mb/intel/shadowmountain: Disable xDCISugnan Prabhu S2021-03-171-1/+1
* mb/intel/tglrvp: Enable RTD3 for WWANBora Guvendik2021-03-152-2/+14
* mb/intel/tglrvp/variants: Disable non-existing BT PCI interface and add BT flagCliff Huang2021-03-152-2/+6
* mb/intel/adlrvp: Disable non-existing BT PCI interface and add BT flagCliff Huang2021-03-151-1/+3
* mb/intel/adlrvp_p: Support VBT for LP4, LP5 and DDR5 SKUsMeera Ravindranath2021-03-152-0/+20
* mb/intel/shadowmountain: Add ACPI entry for BT reset GPIOAamir Bohra2021-03-151-0/+2
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