coreboot.git - Coreboot firmware sources

	Commit message (Expand)	Author	Age	Files	Lines
*	nb/intel/sandybridge: Start PEG link training	Patrick Rudolph	2016-02-18	1	-0/+44
*	nb/intel/sandybridge: Enable basic IOMMU support	Nico Huber	2015-11-04	1	-0/+3
*	tree: drop last paragraph of GPL copyright header	Patrick Georgi	2015-10-31	1	-4/+0
*	northbridge/intel/sandybridge: Do not disable PEG by default	Patrick Rudolph	2015-10-09	1	-2/+4
*	intel sandybridge: add VGA pci device id	Patrick Rudolph	2015-07-13	1	-0/+1
*	Remove address from GPLv2 headers	Patrick Georgi	2015-05-21	1	-1/+1
*	x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer	Kevin Paul Herbert	2015-02-15	1	-5/+5
*	intel/sandybridge: Add VGA pci device ID 0x0162	Damien Zammit	2014-10-23	1	-0/+1
*	sandybridge: Move common northbridge finalize to northbridge code.	Vladimir Serbinenko	2014-10-16	1	-0/+27
*	sandy/ivybridge: Make UMA size configurable.	Vladimir Serbinenko	2014-08-03	1	-2/+7
*	Drop some duplicates of PCI-e config functions	Kyösti Mälkki	2013-07-10	1	-1/+0
*	intel/sandybridge intel/ivybridge: Use MMCONF_SUPPORT_DEFAULT	Kyösti Mälkki	2013-07-04	1	-2/+0
*	x86: Unify arch/io.h and arch/romcc_io.h	Stefan Reinauer	2013-03-22	1	-1/+0
*	GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«	Paul Menzel	2013-03-01	1	-1/+1
*	Support for Celeron 1007U	Stefan Reinauer	2013-01-14	1	-1/+2
*	ELOG: Add support for a monotonic boot counter in CMOS	Duncan Laurie	2012-07-25	1	-0/+8
*	ELOG: Fix boot count increment for non-wake case	Duncan Laurie	2012-07-24	1	-0/+8
*	Ivybridge: fix workaround and enable PAIR	Duncan Laurie	2012-07-24	1	-2/+0
*	Drop (empty) sandybridge_late_initialization()	Stefan Reinauer	2012-07-24	1	-5/+0
*	Add support for Intel Sandybridge CPU (northbridge part)	Stefan Reinauer	2012-04-05	1	-0/+165