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path: root/src/northbridge/intel/sch
Commit message (Expand)AuthorAgeFilesLines
* x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointerKevin Paul Herbert2015-02-152-2/+3
* CBMEM: Tag chipsets with LATE_CBMEM_INITKyösti Mälkki2015-01-271-0/+1
* intel: Drop romstage handoff via scratchpadKyösti Mälkki2015-01-271-23/+0
* northbridge/intel: Do not define include guard as 1Edward O'Callaghan2015-01-061-2/+2
* northbridge/intel: Use DEVICE_NOOP macro over dummy symbolEdward O'Callaghan2014-11-011-7/+3
* sch: Switch to per-device ACPIVladimir Serbinenko2014-10-183-0/+6
* ACPI: Remove CONFIG_GENERATE_ACPI_TABLESVladimir Serbinenko2014-10-162-3/+1
* northbridge/intelsch/raminit.h: Remove a trailing whitespaceElyes HAOUAS2014-07-241-74/+74
* northbridge,ASL: Trivial - drop trailing blank lines at EOFEdward O'Callaghan2014-07-173-4/+0
* intel: Remove GFXUMA and related global variablesKyösti Mälkki2014-05-191-0/+1
* CBMEM northbridges: Remove references to global high_tables_baseKyösti Mälkki2013-09-111-5/+1
* Add directive __SIMPLE_DEVICE__Kyösti Mälkki2013-08-011-3/+3
* Drop some duplicates of PCI-e config functionsKyösti Mälkki2013-07-101-66/+0
* Fix MMCONF_SUPPORT_DEFAULT for ramstageKyösti Mälkki2013-07-101-5/+1
* Move select MMCONF_SUPPORT under northbridgeKyösti Mälkki2013-07-031-0/+1
* intel/sch: Use MMCONF_BASE_ADDRESSKyösti Mälkki2013-06-251-1/+1
* x86: Unify arch/io.h and arch/romcc_io.hStefan Reinauer2013-03-221-1/+3
* GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«Paul Menzel2013-03-0110-10/+10
* Drop CONFIG_WRITE_HIGH_TABLESStefan Reinauer2013-02-281-6/+1
* sconfig: rename lapic_cluster -> cpu_clusterStefan Reinauer2013-02-141-1/+1
* sconfig: rename pci_domain -> domainStefan Reinauer2013-02-141-1/+1
* Remove assembly coded log2 functionRonald G. Minnich2012-11-281-1/+0
* Get rid of drivers classPatrick Georgi2012-11-271-3/+3
* northbridge/sch: move the \n so it reads a little betterSebastian Andrzej Siewior2012-10-261-1/+2
* northbridge/sch: read the size of main memory from the proper registerSebastian Andrzej Siewior2012-10-261-3/+3
* northbridge/sch: Read the GPU memory from the correct PCI deviceSebastian Andrzej Siewior2012-10-261-1/+1
* northbridge/sch: don't overwrite hightables with GPU / TSEG memorySebastian Andrzej Siewior2012-10-261-1/+3
* Remove chip.h files without config structureKyösti Mälkki2012-10-072-23/+0
* HAVE_HIGH_TABLES is gonePatrick Georgi2012-09-251-1/+0
* Auto-declare chip_operationsKyösti Mälkki2012-08-221-1/+0
* Cleanup coreboot memory table includesKyösti Mälkki2012-08-081-1/+0
* Intel and GFXUMA: fix MTRR and use uma_resource()Kyösti Mälkki2012-07-271-12/+14
* Intel i945 and sch: no memory over 4GBKyösti Mälkki2012-07-271-3/+0
* Intel SCH northbridge: fix resource indexKyösti Mälkki2012-07-201-3/+3
* Define global uma_memory variablesKyösti Mälkki2012-07-161-3/+0
* Clean up #ifsPatrick Georgi2012-05-081-2/+2
* Unify IO APIC address specificationPatrick Georgi2012-04-121-1/+2
* Avoid ../../.. paths in ASL filesPatrick Georgi2012-02-171-3/+3
* use acpi.h include instead of manually adding acpi_slp_type.Stefan Reinauer2011-10-151-2/+1
* fix compilation of intel/sch northbridge code with gcc 4.6Stefan Reinauer2011-10-141-0/+3
* The same mechanisms are used for normal and fallback images. Stefan Reinauer2010-12-191-1/+1
* Fix a few whitespace and coding style issues.Uwe Hermann2010-12-188-399/+452
* A couple of Poulsbo fixes:Patrick Georgi2010-12-181-11/+14
* Support Intel SCH (Poulsbo) and add iwave/iWRainbowG6 boardPatrick Georgi2010-12-1817-0/+2276
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