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* intel/pineview: Don't try to store 34 bits in 32Stefan Reinauer2016-05-081-1/+1
* amd/gx2 + amd/lx: Fix shift overflow issueStefan Reinauer2016-05-062-4/+4
* rdc/r8610: Move to src/socStefan Reinauer2016-05-053-146/+0
* dmp/vortex86ex: Merge northbridge and southbridge into socStefan Reinauer2016-05-057-611/+0
* nb/intel/sandybridge/raminit: support calling dram_freq multiple timesPatrick Rudolph2016-05-041-0/+11
* nb/intel/sandybridge/raminit: add additional fallbacksPatrick Rudolph2016-05-041-0/+44
* nb/intel/gm45: Fix native text mode initializationNick High2016-05-041-3/+3
* nb/amd/mct_ddr3: Only initialize ECC bits onceTimothy Pearson2016-05-021-5/+1
* nb/amd/mct_ddr3: Warn if MaxRdLatency training fails on Family 15hTimothy Pearson2016-05-011-0/+3
* nb/amd/mct_ddr3: Stop receiver enable cycle training after window foundTimothy Pearson2016-05-011-0/+9
* nb/amd/mct_ddr3: Do not constantly reset read data timing registers to 0Timothy Pearson2016-05-011-5/+6
* nb/amd/mct_ddr3: Skip nibble training when current DIMM is not x4Timothy Pearson2016-05-012-0/+8
* nb/amd/mct_ddr3: Fix x4 DIMM receiver enable training on Fam15hTimothy Pearson2016-05-011-21/+28
* nb/intel/sandybridge/raminit: fix regression "always use mrccache"4.44.4Patrick Rudolph2016-04-291-7/+14
* nb/amd/mct_ddr3: Restart system on training failure instead of using die()Timothy Pearson2016-04-281-1/+4
* nb/amd/mct_ddr3: Report correct DIMM in MRS setup routinesTimothy Pearson2016-04-261-3/+3
* nb/amd/mct_ddr3: Fix a number of minor errors in RDIMM setupTimothy Pearson2016-04-261-17/+72
* nb/amd/mct_ddr3: Scale lane delays for each DIMM after MEMCLK changeTimothy Pearson2016-04-252-3/+3
* Revert "nb/amd/mct_ddr3: Disable MCE framework during DRAM training"Timothy Pearson2016-04-223-27/+27
* nb/amd/mct_ddr3: Enhance debugging around MEMCLK frequency changeTimothy Pearson2016-04-221-1/+7
* nb/amd/mct_ddr3: Fix RDIMM training on certain DIMMsTimothy Pearson2016-04-221-44/+39
* nb/amd/mct_ddr3: Run fence training on each node after memory clock changeTimothy Pearson2016-04-221-2/+2
* AMD CIMX: Drop unused codeKyösti Mälkki2016-04-201-7/+0
* kbuild: Allow drivers to fit src/drivers/[X]/[Y]/ schemeStefan Reinauer2016-04-191-1/+1
* northbridge/amd/{lx,gx2}: remove immediate accesses of 0Patrick Georgi2016-04-164-8/+6
* amd/agesa/family12/dimmSpd.c: Indent (tab) fixEdward O'Callaghan2016-04-131-21/+23
* and/nb/mct_ddr3: Pack all structures passed to ramstage and set alignmentTimothy Pearson2016-04-112-9/+9
* nb/amd/amdfam10: Write MCT variables to flash after PCI configurationTimothy Pearson2016-04-112-12/+7
* nb/intel/sandybridge/raminit: always use mrccachePatrick Rudolph2016-04-101-25/+77
* Revert "nb/amd/mct_ddr3: Enable DIMM parity when RDIMMs installed"Timothy Pearson2016-04-081-1/+3
* nb/amd/mct_ddr3: Reenable sync flood after ECC initTimothy Pearson2016-04-082-8/+9
* nb/amd/mct_ddr3: Add MCE reporting logicTimothy Pearson2016-04-083-1/+25
* nb/amd/amdfam10: Only flag machine check exception if valid bit is setTimothy Pearson2016-04-081-1/+1
* nb/amd/mct_ddr3: Cache whether ECC is allowed at the platform levelTimothy Pearson2016-04-082-3/+9
* nb/intel/sandybridge/raminit: die in toplevel functionPatrick Rudolph2016-04-051-11/+4
* nb/intel/sandybridge/raminit: prepare raminit for fallbackPatrick Rudolph2016-04-051-53/+148
* nb/amd/mct_ddr3: Fix revision mask for DR processorsTimothy Pearson2016-04-011-1/+1
* nb/amd_mct_ddr3: Move DRAM MCE sync flood enable to ramstageTimothy Pearson2016-03-314-10/+49
* nb/amd/mct_ddr3: Clear early MCEs and report DRAM MCEsTimothy Pearson2016-03-312-10/+28
* nb/amd/mct_ddr3: Disable MCE framework during DRAM trainingTimothy Pearson2016-03-313-17/+29
* nb/amd/mct_ddr3: Enable DIMM parity when RDIMMs installedTimothy Pearson2016-03-301-3/+1
* northbridge/amd/amdfam10: Add family15h model10h-1fh (Trinity)Damien Zammit2016-03-309-10/+67
* nb/intel/sandybridge/raminit: move ram training into seperate functionPatrick Rudolph2016-03-301-82/+90
* nb/intel/sandybridge/raminit: move dimm_info into ramctr_timingPatrick Rudolph2016-03-291-13/+19
* nb/amd/mct_ddr3: Use standard C function calls in mct_ResetDataStruct_D()Timothy Pearson2016-03-281-21/+8
* nb/amd/amdmct: Select max_lanes based on ECC presence or absenceDamien Zammit2016-03-264-88/+151
* nb/amd/mct_ddr3: Set the NBP0 read latency from P0 trained valuesTimothy Pearson2016-03-245-20/+21
* nb/amd/mct_ddr3: Remove spurious Addl_Index variable in dqsTrainMaxRdLatency_...Timothy Pearson2016-03-231-3/+1
* nb/amd/amdmct/mct_ddr3: Ensure BlockRxDqsLock does not remain setTimothy Pearson2016-03-211-0/+6
* cpu/x86/mtrr: move cache_ramstage() to its only userAaron Durbin2016-03-161-3/+9
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