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path:
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northbridge
Commit message (
Expand
)
Author
Age
Files
Lines
*
northbridge/amd/amdfam10: Limit maximum RAM clock to BKDG recommendations
Timothy Pearson
2015-10-27
2
-7
/
+47
*
northbridge/amd/amdmct: Fix broken AMD K10 DDR3 memory initalization
Timothy Pearson
2015-10-26
19
-1142
/
+1253
*
AMD Family 0Fh: ensure CONFIG_CBB and CONFIG_CDB have sane values
Jonathan A. Kollasch
2015-10-25
1
-0
/
+8
*
northbridge/amd/amdfam10: Enable advanced PCIe setup options
Timothy Pearson
2015-10-25
1
-0
/
+4
*
cpu/amd: Add initial support for AMD Socket G34 processors
Timothy Pearson
2015-10-24
3
-21
/
+213
*
Intel: Move MCRS ResourceTemplate outside of _CRS method
Martin Roth
2015-10-23
8
-888
/
+880
*
northbridge/amd/amdmct: Fix Family 15h detection
Timothy Pearson
2015-10-23
2
-2
/
+3
*
northbridge/amd/amdmct/mct_ddr3: Fix curly brace style violations
Timothy Pearson
2015-10-23
1
-27
/
+10
*
northbridge/amd/amdfam10: Fix typo in comment
Timothy Pearson
2015-10-23
1
-1
/
+1
*
Revert "Remove sandybridge and ivybridge FSP code path"
Martin Roth
2015-10-22
22
-0
/
+2417
*
cpu/mtrr.h: Fix macro names for MTRR registers
Alexandru Gagniuc
2015-10-15
3
-12
/
+12
*
Revert "Remove FSP Rangeley SOC and mohonpeak board support"
Martin Roth
2015-10-14
15
-0
/
+1319
*
gma: Consolidate Intel IGD ACPI code some more
Nico Huber
2015-10-12
10
-318
/
+7
*
Kill lvds_num_lanes
Vladimir Serbinenko
2015-10-11
4
-4
/
+4
*
Derive lvds_dual_channel from EDID timings.
Vladimir Serbinenko
2015-10-11
6
-35
/
+35
*
nb/intel/sandybridge/raminit: Add edge write discovery check
Patrick Rudolph
2015-10-09
1
-0
/
+2
*
northbridge/intel/sandybridge: Do not disable PEG by default
Patrick Rudolph
2015-10-09
1
-2
/
+4
*
northbridge/intel/sandybridge: Enable PEG clock-gating on demand
Patrick Rudolph
2015-10-09
3
-15
/
+48
*
x86/bootblock: Use LDFLAGS_bootblock to enable garbage collection
Alexandru Gagniuc
2015-10-07
2
-2
/
+2
*
northbridge/intel/nehalem: Fix native VGA init
Nicolas Reinecke
2015-10-04
1
-15
/
+17
*
Remove FSP Rangeley SOC and mohonpeak board support
Alexandru Gagniuc
2015-10-03
15
-1319
/
+0
*
Remove sandybridge and ivybridge FSP code path
Alexandru Gagniuc
2015-10-03
23
-2495
/
+0
*
sandybridge ivybridge: Treat native init as first class citizen
Alexandru Gagniuc
2015-10-03
6
-4087
/
+4087
*
northbridge/intel/gm45: Fix native VGA init
Audrey Pearson
2015-10-01
1
-15
/
+17
*
amd/family14: Add k10temp thermal zone.
Tobias Diedrich
2015-09-30
1
-0
/
+8
*
coreboot: move TS_END_ROMSTAGE to one spot
Aaron Durbin
2015-09-24
1
-1
/
+0
*
AGESA S3 support: Fix excessive stack usage
Kyösti Mälkki
2015-09-14
1
-1
/
+2
*
x86: bootblock: remove linking and program flow from build system
Aaron Durbin
2015-09-09
4
-2
/
+12
*
intel/sandybridge: Do not guard native VGA init by #ifdefs
Alexandru Gagniuc
2015-09-07
3
-136
/
+140
*
northbridge/amd/amdfam10: Use adequate size for HT speed limit field
Timothy Pearson
2015-09-07
1
-1
/
+1
*
intel i945: Fix native VGA initialization
Mono
2015-09-07
1
-12
/
+14
*
north/intel/sandybridge: Fix native VGA initialization
Alexandru Gagniuc
2015-09-07
1
-17
/
+18
*
intel: Do not hardcode the position of mrc.cache
Alexandru Gagniuc
2015-09-07
3
-7
/
+3
*
bootstate: remove need for #ifdef ENV_RAMSTAGE
Aaron Durbin
2015-09-04
2
-4
/
+2
*
x86: remove cpu_incs as romstage Make variable
Aaron Durbin
2015-09-04
1
-1
/
+1
*
northbridge/intel/gm45/Kconfig: Remove IOMMU symbol choice
Martin Roth
2015-08-31
3
-6
/
+1
*
AMD Bettong: Lower the TOM to give more MMIO space
zbao
2015-08-31
1
-0
/
+1
*
Kconfig: Remove EXPERT mode
Alexandru Gagniuc
2015-08-30
2
-3
/
+3
*
edid: Use edid_mode struct to reduce redundancy
David Hendricks
2015-08-28
1
-14
/
+14
*
Intel: Remove CACHE_MRC_BIN - 'selected' everywhere in Kconfig
Martin Roth
2015-08-25
2
-5
/
+0
*
northbridge/amd/amdfam10: Redirect legacy VGA memory access to MMIO
Timothy Pearson
2015-08-18
1
-0
/
+13
*
amd: raminit sysinfo offset fix
Aaron Durbin
2015-08-13
5
-9
/
+9
*
intel/i945: don't read structs out of uninitialized pointers
Patrick Georgi
2015-08-10
1
-0
/
+3
*
AMD K8: Avoid duplicate variables in SSDT on multisocket systems
Jonathan A. Kollasch
2015-08-09
1
-0
/
+11
*
intel/haswell: fix CHROMEOS builds for haswell
Patrick Georgi
2015-07-29
1
-0
/
+1
*
intel raminit: rewrite timB high adjust calculation
Patrick Rudolph
2015-07-22
1
-12
/
+11
*
intel raminit: support two DIMMs per channel
Patrick Rudolph
2015-07-22
1
-1
/
+1
*
Port Fam14 northbridge code to 64bit
Stefan Reinauer
2015-07-21
2
-7
/
+9
*
Revert "northbridge/amd/pi: Add support for memory settings"
Marc Jones
2015-07-21
2
-18
/
+0
*
northbridge/amd/pi: Add support for memory settings
Dave Frodin
2015-07-20
2
-0
/
+18
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