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* soc/amd/cezanne/include/gpio: fix GPIO 106 native function namesFelix Held2021-11-041-2/+2
| | | | | | | | | | | The name looked a bit odd and the Cezanne PPR #56569 Rev 3.03 confirmed that the native function names don't have the EMMC_ prefix. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I917c74afd98f2e2133e160d352f11f08c19a3ec6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/58874 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
* soc/amd/common/blocks/include: rename gpio_banks.h to gpio.hFelix Held2021-09-231-1/+1
| | | | | | | | | | | This brings the AMD SoC GPIO code in line with the Intel SoC code and removes the not really needed suffix. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Ie2dbec81dfe503869beb2872b01a7475e2b88b33 Reviewed-on: https://review.coreboot.org/c/coreboot/+/57842 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
* soc/amd/cezanne/include/gpio: add remote GPIO pin mux definitionsFelix Held2021-09-091-1/+37
| | | | | | | | | | | | | | | | | | Add the pin definitions for the remote GPIOs and the GPIO pin mux values for the GPIO mode of those pins. For now, accessing the remote GPIOs is only supported from the native coreboot code running on the x86 cores and not from verstage on PSP or ACPI. BUG=b:194524995 TEST=On Majolica with a Cezanne APU configuring GPIO 262 as output and then toggling that GPIO in an infinite loop in the mainboard's bootblock code results in GPIO 262 toggling as expected. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I0e57042e74da88503b36d6065e9500876287f8bb Reviewed-on: https://review.coreboot.org/c/coreboot/+/56811 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
* soc/amd/*/include/soc/gpio: remove GPIO_2_EVENTFelix Held2021-08-311-2/+0
| | | | | | | | | | | | | commit de7262f82cdc1a7c868dbc9ca41e186e885eb2ba (soc/amd: remove special GPIO_2 override soc_gpio_hook) removed the workaround that needed those definitions, so remove the now unused GPIO_2_EVENT definitions. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I3f3e3061eade0e0cd25e2263451ccf6cefdc4ea4 Reviewed-on: https://review.coreboot.org/c/coreboot/+/56812 Reviewed-by: Jason Glenesk <jason.glenesk@gmail.com> Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* soc/amd/cezanne: Allow GPIO defines to be used in ASLMathew King2021-03-081-1/+3
| | | | | | | | | | | BUG=b:180507937 TEST=builds Signed-off-by: Mathew King <mathewk@chromium.org> Change-Id: Ic29fa569899e7b77819ce7f72c6a748621684c40 Reviewed-on: https://review.coreboot.org/c/coreboot/+/51290 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
* soc/amd/cezanne: add GPIO definitionsFelix Held2020-12-171-0/+285
Change-Id: I67930267a89ba0c64ec7e40e2bfa30a0618d104b Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48564 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
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