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path: root/src/soc/amd/cezanne
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* soc/amd/*/include/smi: move NUMBER_SMITYPES definition to the topFelix Held2021-11-051-1/+2
* soc/amd/*/include/smi: fix off-by-one in SCIMAPS definesFelix Held2021-11-051-1/+1
* Kconfig,soc/amd/cezanne: Make COOP_MULTITASKING select TIMER_QUEUERaul E Rangel2021-11-041-1/+0
* soc/amd/cezanne/include/gpio: fix GPIO 106 native function namesFelix Held2021-11-041-2/+2
* soc/amd/cezanne/include/cppc: use AMD_CEZANNE_CPPC_H as include guardFelix Held2021-11-041-3/+3
* soc/amd/cezanne/include/aoac_defs: drop leading newlineFelix Held2021-11-031-1/+0
* soc/amd/cezanne/include: replace PICASSO with CEZANNE in include guardsFelix Held2021-11-032-6/+6
* soc/amd/*/cpu: handle mp_init_with_smm failureFelix Held2021-11-031-3/+3
* cpu/x86/Kconfig: Remove unused CPU_ADDR_BITSArthur Heymans2021-11-031-4/+0
* psp_verstage: convert relative address in EFS2Kangheui Won2021-11-021-2/+2
* cpu/x86: Introduce and use `CPU_X86_LAPIC`Felix Held2021-10-261-2/+0
* cpu,soc/x86: always include cpu/x86/mtrr on x86 CPUs/SoCsFelix Held2021-10-251-1/+0
* soc/amd/cezanne,picasso/chipset.cb: drop LAPIC deviceFelix Held2021-10-221-1/+0
* arch/x86/ioapic: Select IOAPIC with SMPKyösti Mälkki2021-10-221-1/+0
* cpu/x86/mp_init: move printing of failure message into mp_init_with_smmFelix Held2021-10-221-2/+2
* cpu/x86/mp_init: use cb_err as mp_init_with_smm return typeFelix Held2021-10-211-1/+2
* acpigen,soc/amd,cpu/intel: rework static DWORD for CPPC tableMichael Niewöhner2021-10-212-21/+22
* psp_verstage: remove psp_ef_table structKangheui Won2021-10-201-1/+1
* acpi/acpigen: Constify CST functions' pointersAngel Pons2021-10-191-1/+1
* soc/amd: make configure_espi_with_mb_hook call conditionalFelix Held2021-10-151-2/+6
* soc/amd/common/include/espi: rename configure_espiFelix Held2021-10-151-1/+1
* soc/amd/common/block/i2c: implement proper read_resourceFelix Held2021-10-151-5/+0
* soc/amd/cezanne,picasso/uart: implement read_resourceFelix Held2021-10-151-1/+6
* src/soc/amd/cezanne: enable clock gatingJulian Schroeder2021-10-132-0/+34
* soc/amd/common/block/espi_util: Refactor eSPI SetupKarthikeyan Ramasubramanian2021-10-133-19/+3
* soc/amd/*: Enable ACPIMMIO decode first in fch_pre_initFelix Held2021-10-131-1/+3
* soc/amd/cezanne,soc/intel/common: rework CPPC table generationMichael Niewöhner2021-10-131-148/+29
* soc/amd/cezanne/include/southbridge: add some more PM register definesFelix Held2021-10-111-0/+4
* soc/amd/common/include/lpc: add definitions for LPC LDRQ control bitsFelix Held2021-10-111-0/+6
* Revert "soc/amd/cezanne: Disable Co-op multitasking"Raul E Rangel2021-10-051-0/+3
* src/soc to src/superio: Fix spelling errorsMartin Roth2021-10-051-1/+1
* soc/amd/cezanne/early_fch: move mb_set_up_early_espi into if blockFelix Held2021-09-271-2/+3
* soc/amd/cezanne: Enable CCP DMAKarthikeyan Ramasubramanian2021-09-271-0/+1
* soc/amd/cezanne, vc/amd/fsp/*: Add support for CCP DMA SVC callKarthikeyan Ramasubramanian2021-09-271-0/+7
* soc/amd/common/blocks/include: rename gpio_banks.h to gpio.hFelix Held2021-09-235-5/+5
* soc/amd: rename program_gpios to gpio_configure_padsFelix Held2021-09-231-1/+1
* soc/amd/cezanne/fsp_m_params: use DEV_PTR to check if device is enabledFelix Held2021-09-211-84/+3
* soc/amd/cezanna/acpi/mmio.asl: enable ACPI AOAC for I2CJulian Schroeder2021-09-201-8/+4
* soc/amd/cezanne/acpi/mmio: uncomment AOAC_DEVICE macro for UARTsFelix Held2021-09-201-4/+2
* soc/amd/cezanne/include/gpio: add remote GPIO pin mux definitionsFelix Held2021-09-091-1/+37
* soc/amd/common/block/include/i2c: introduce I2C_RESET_SCL_PIN macroFelix Held2021-09-091-4/+4
* soc/amd/cezanne/fsp_m_params: set usb_phy version and length.Julian Schroeder2021-09-081-1/+5
* soc/amd/*/bootblock,early_fch: rework i2c_scl_pins configurationFelix Held2021-09-081-5/+5
* soc/amd/cezanne: Increase the FSP_M_SIZE configurationKarthikeyan Ramasubramanian2021-09-011-2/+2
* soc/amd/*/include/soc/gpio: remove GPIO_2_EVENTFelix Held2021-08-311-2/+0
* soc/amd/cezanne/fch: implement and use fch_clk_output_48MhzFelix Held2021-08-302-0/+11
* soc/amd: Show SPI settings in bootblockMartin Roth2021-08-301-0/+1
* soc/amd/cezanne/early_fch: Perform early SPI initializationKarthikeyan Ramasubramanian2021-08-301-1/+1
* soc/amd/cezanne/chip: add functionality to power down eMMC interfaceFelix Held2021-08-292-0/+7
* soc/amd/cezanne: Disable Co-op multitaskingRaul E Rangel2021-08-181-2/+0
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