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* imgtec/pistachio: Fix memlayout ASSERT with new binutilsStefan Reinauer2016-04-211-2/+2
* urara: Increase bootblock sizeJulius Werner2016-02-221-4/+17
* tegra132/pistachio: Increase romstage size in memlayout.ldJulius Werner2016-02-121-3/+3
* imgtec/pistachio: disable default RPU gate register valuesIonela Voinescu2015-12-312-0/+13
* imgtec/pistachio: memlayout: update GRAM sizeIonela Voinescu2015-12-311-1/+1
* imgtec/pistachio: I2C: fix base address for I2C clock setupIonela Voinescu2015-12-311-2/+2
* imgtec/pistachio: identity map SOC registers regionIonela Voinescu2015-12-311-0/+2
* imgtec/pistachio: Add SOC_REGISTERS memory regionIonela Voinescu2015-12-311-0/+2
* imgtec/pistachio: Use SYS PLL in integer modeIonela Voinescu2015-12-311-2/+38
* mips: add coherency argument to identity mappingIonela Voinescu2015-12-291-3/+3
* mainboard/google/urara: change SYS PLL to 700MHzIonela Voinescu2015-12-272-9/+18
* imgtec/pistachio: DDR2, DDR3: DLL reset setIonela Voinescu2015-12-212-2/+2
* imgtec/pistachio: DDR2, DDR3: DQS gate earlyIonela Voinescu2015-12-213-10/+25
* imgtec/pistachio: increase CBFS cacheIonela Voinescu2015-12-211-2/+2
* Drop src/cpu/ indirection for MIPSStefan Reinauer2015-12-171-1/+4
* soc/imgtec/pistachio: add implementation for system resetIonela Voinescu2015-12-171-4/+6
* soc/imgtec/pistachio: Implement hard_reset()Stefan Reinauer2015-12-173-0/+27
* tree: drop last paragraph of GPL copyright headerPatrick Georgi2015-10-3113-52/+0
* linking: link bootblock.elf with .data and .bss sections againAaron Durbin2015-09-221-7/+1
* verstage: use common program.ld for linkingAaron Durbin2015-09-091-1/+0
* imgtec/pistachio: remove timestamp_get() implementationAaron Durbin2015-08-311-6/+1
* imgtech/pistacho: Add vboot2 memory regionPatrick Georgi2015-08-091-1/+3
* Remove address from GPLv2 headersPatrick Georgi2015-06-241-2/+1
* Remove old HAVE_UART_MEMORY_MAPPED select statementsMartin Roth2015-06-211-1/+0
* pistachio: add DDR3 initialization codeIonela Voinescu2015-06-125-112/+655
* pistachio: Use passive windowing as DQS gating schemeIonela Voinescu2015-06-121-0/+23
* pistachio: sort included header filesIonela Voinescu2015-06-107-13/+13
* pistachio: initialize cbmem area to be emptyIonela Voinescu2015-06-101-0/+7
* pistachio: increase romstage sizeIonela Voinescu2015-06-091-2/+2
* Revert "pistashio: bump up romstage size"Aaron Durbin2015-06-021-2/+2
* pistashio: bump up romstage sizeAaron Durbin2015-05-261-2/+2
* Remove address from GPLv2 headersPatrick Georgi2015-05-2112-20/+12
* Remove Kconfig variable that has no effectPatrick Georgi2015-05-191-1/+0
* imgtec/pistachio: Add comment on the unusual memory layoutPatrick Georgi2015-05-071-1/+4
* imgtech/pistachio: Give some more space to the bootblockPatrick Georgi2015-04-301-3/+3
* kbuild: automatically include SOCsStefan Reinauer2015-04-292-1/+3
* imgtec/pistachio: DDR reads return to controller with no bubblesIonela Voinescu2015-04-221-2/+2
* imgtec/pistachio: DDR row/bank/column mappingIonela Voinescu2015-04-221-2/+2
* soc: select generic gpio lib on (almost) all non-x86 SOCsStefan Reinauer2015-04-221-0/+1
* imgtec/pistachio: increase RAM CBFS cache sizeVadim Bendebury2015-04-221-2/+2
* pistachio: Remove 50% DDR bandwidth restrictionIonela Voinescu2015-04-211-1/+1
* pistachio: Decrease DDR ODT from 75R to 50RIonela Voinescu2015-04-211-1/+1
* pistachio: clean DDR2 initialization codeIonela Voinescu2015-04-211-155/+15
* pistachio: add clock setup for all I2C interfacesIonela Voinescu2015-04-212-19/+19
* urara: Identity map DRAM/SRAMAndrew Bresticker2015-04-212-11/+49
* imgtec/pistachio: Add spi_crop_chunk()Patrick Georgi2015-04-211-0/+5
* pistachio: Move console UART to a Kconfig variableDavid Hendricks2015-04-171-28/+5
* pistachio: add DDR2 initialization codeIonela Voinescu2015-04-174-1/+704
* pistachio: report UART register widthVadim Bendebury2015-04-171-1/+1
* uart: pass register width in the coreboot tableVadim Bendebury2015-04-171-0/+1
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