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path: root/src/soc/intel/broadwell/pcie.c
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* soc/intel/broadwell: Fix 16-bit read/write PCI_COMMAND registerElyes HAOUAS2020-05-011-7/+3
* soc/intel/broadwell: Use SPDX for GPL-2.0-only filesAngel Pons2020-04-061-13/+2
* soc: Remove copyright noticesPatrick Georgi2020-03-181-2/+0
* intel/pci: Utilise pci_def.h for PCI_BRIDGE_CONTROLKyösti Mälkki2019-10-011-4/+4
* soc/intel: Use config_of()Kyösti Mälkki2019-07-181-6/+4
* device/pciexp_device: Convert LTR non-snoop/snoop value into common macroSubrata Banik2019-03-271-1/+3
* {northbridge, soc, southbridge}/intel: Make use of generic set_subsystem()Subrata Banik2019-03-211-11/+1
* coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)Julius Werner2019-03-081-2/+2
* soc/intel/broadwell: Get rid of device_tElyes HAOUAS2018-06-011-14/+14
* intel/broadwell: Add option to enable/disable the PCIe AER capabilityYouness Alaoui2018-05-081-2/+6
* intel/broadwell: If L1 Sub state is disabled, do not set capabilityYouness Alaoui2018-05-081-1/+4
* pci: Move inline PCI functions to pci_ops.hPatrick Rudolph2018-04-201-0/+1
* soc/intel/broadwell: Fix other issues detected by checkpatchLee Leahy2017-03-171-26/+29
* soc/intel/broadwell: Add int to unsignedLee Leahy2017-03-171-2/+3
* PCI ops: Define read-modify-write routines globallyKyösti Mälkki2016-12-061-68/+45
* intel PCI ops: Remove explicit PCI MMCONF accessKyösti Mälkki2016-12-061-1/+1
* intel/broadwell: fix typoPatrick Georgi2016-07-311-1/+1
* soc/intel/broadwell: Init var before use, only use when neededMartin Roth2015-12-201-1/+1
* tree: drop last paragraph of GPL copyright headerPatrick Georgi2015-10-311-4/+0
* Remove address from GPLv2 headersPatrick Georgi2015-05-211-1/+1
* broadwell: Set PCIe replay timeout to 0xDDuncan Laurie2015-04-101-1/+1
* broadwell: Skip steps when disabling PCIe portDuncan Laurie2015-04-101-2/+2
* broadwell: Fix PCIe ports programming sequences to enable HSIOPCWenkai Du2015-04-101-5/+18
* Broadwell: Synchronization with FRC for Root Port Power ManagementKenji Chen2015-04-101-3/+10
* broadwell: Change all SoC headers to <soc/headername.h> systemJulius Werner2015-04-071-8/+8
* Broadwell: Fix PCIe L1 Sub-State capability ID not filled.Kenji Chen2015-04-041-1/+4
* Broadwell: Select PCIE_L1_SUB_STATE and apply Broadwell settings.Kenji Chen2015-04-021-0/+7
* Broadwell: Synchronize for power management with FRCKenji Chen2015-04-021-0/+11
* Broadwell: Synchronize RO, Link Arbiter, and OBFF with FRCKenji Chen2015-04-021-2/+7
* Broadwell: Revise programming flow for write-once registersKenji Chen2015-04-021-4/+3
* broadwell: Configure IOSF Port and Grant CountKenji Chen2015-04-021-1/+25
* broadwell: Update PCIe configuration to follow BWGKane Chen2015-04-021-0/+1
* broadwell: Fix some errors in selftestKane Chen2015-03-271-0/+1
* broadwell: Apply pcie updates from 2.1.0 ref codeKane Chen2015-03-271-7/+11
* broadwell: Misc updates from 2.1.0 ref codeDuncan Laurie2015-03-271-0/+3
* intel/broadwell: Spelling fixesMartin Roth2014-12-081-4/+4
* broadwell: add new intel SOCDuncan Laurie2014-10-221-0/+632
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