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path: root/src/soc/intel/cannonlake/Kconfig
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* drivers/intel/fsp2_0: move common cbmem_top_chipset to fsp driverMichael Niewöhner2019-11-111-1/+0
* soc/intel/common/sa: Remove EBDA dependencyArthur Heymans2019-11-101-1/+1
* cpu/x86/tsc: Flip and rename TSC_CONSTANT_RATE to UNKNOWN_TSC_RATEKyösti Mälkki2019-11-031-1/+0
* soc/intel/common/pch: move EBDA Kconfig to soc levelMichael Niewöhner2019-11-021-0/+1
* soc/intel/{cnl, icl}: Update the DCACHE_BSP_STACK_SIZE to 129KiBV Sowmya2019-10-201-2/+3
* soc/intel/cannonlake: Allow coreboot to reserve stack for fspBora Guvendik2019-09-131-0/+1
* intel/fsp2_0: Add help text for FSP_TEMP_RAM_SIZE KconfigSubrata Banik2019-09-111-0/+9
* security/intel: Add TXT infrastructurePatrick Rudolph2019-09-021-0/+4
* arch/x86: Flip option NO_CAR_GLOBAL_MIGRATIONKyösti Mälkki2019-08-111-1/+0
* arch/x86: Enable POSTCAR_CONSOLE by defaultKyösti Mälkki2019-08-111-1/+0
* lib/stage_cache: Refactor Kconfig optionsKyösti Mälkki2019-08-081-1/+0
* soc/intel/common/pch: Move thermal kconfig selection into common/pchSubrata Banik2019-08-021-1/+0
* soc/intel/cannonlake: Enable FSP to use coreboot stack for cometlakeAamir Bohra2019-07-311-0/+2
* soc/intel/cannonlake: Enable PCH Thermal Sensor configuration for S0ixSumeet Pawnikar2019-07-311-0/+1
* soc/intel/{cnl,icl}: Always use CAR NEM enhanced by defaultAngel Pons2019-07-161-2/+1
* soc/intel/common/timer: Move USE_LEGACY_8254_TIMER into common/block/timerSubrata Banik2019-07-111-8/+0
* arch/x86: Flip HAVE_MONOTONIC_TIMER defaultKyösti Mälkki2019-07-091-1/+0
* cpu/x86: Flip SMM_TSEG defaultKyösti Mälkki2019-07-091-1/+0
* soc/intel/cannonlake: Override PRERAM_CBMEM_CONSOLE_SIZE default valueSubrata Banik2019-07-061-0/+4
* soc/intel/cannonlake: Add support to log XHCI wake eventsPaul Fagerburg2019-07-021-0/+2
* Use 3rdparty/intel-microcodeArthur Heymans2019-07-011-0/+2
* soc/intel/cannonlake: fix use of legacy 8254 timerMatt DeVillier2019-06-281-0/+8
* soc/intel/cannonlake/Kconfig: Don't have all variants select SOC_INTEL_CANNON...Arthur Heymans2019-06-261-14/+13
* soc/intel/cannonlake: Rename SOC_INTEL_COMMON_CANNONLAKE_BASEArthur Heymans2019-06-211-5/+5
* soc/intel/{cml, whl}: Add option to skip HECI disable in SMMSubrata Banik2019-06-131-0/+1
* soc/intel: Replace UART_BASE() and friends with a KconfigNico Huber2019-06-031-0/+5
* soc/intel/cannonlake: Fix pcie clock numberLijian Zhao2019-05-091-0/+5
* soc/intel/cannonlake: Add GPIO dual-route support.Tim Wawrzynczak2019-05-061-0/+1
* vboot: refactor OPROM codeJoel Kitching2019-04-301-1/+1
* 3rdparty/fsp: Update submodule pointer to upstream masterMatt DeVillier2019-04-251-1/+1
* soc/intel/cannonlake: Enable PlatformDebugConsent by KconfigKane Chen2019-04-231-0/+11
* Revert "soc/intel/cannonlake: Enable coreboot MP PPI service for WHL/CML"Lijian Zhao2019-04-221-8/+0
* soc/intel/cannonlake: Implement soc side VMX supportRonak Kanabar2019-04-161-0/+1
* soc/intel/cannonlake: Enable coreboot MP PPI service for WHL/CMLSubrata Banik2019-04-161-0/+8
* soc/intel/cannonlake: Select FSP_M_XIPFurquan Shaikh2019-04-121-0/+1
* soc/intel/cannonlake: Do not use XIP_ROM_SIZEFurquan Shaikh2019-04-121-0/+1
* soc/intel/cannonlake: Add CometLake SoC supportSubrata Banik2019-02-281-0/+8
* soc/intel/cannonlake: Add a config for configuring SD_VDD1_PWR_EN#Rizwan Qureshi2019-02-271-0/+9
* soc/intel/cannonlake: Add Whiskeylake SoC kconfigSubrata Banik2019-02-071-4/+24
* soc/intel/cannonlake: Remove SOC_INTEL_CANNONLAKE_MEMCFG_INIT KconfigSubrata Banik2019-02-041-4/+0
* soc/intel/cannonlake: Hook up MicrocodeLijian Zhao2019-01-121-1/+0
* Untangle CBFS microcode updatesNico Huber2019-01-101-0/+1
* soc/intel: Clean mess around UART_DEBUGNico Huber2019-01-091-17/+0
* soc/intel/cannonlake: Fix I2C clock inputDuncan Laurie2018-12-071-1/+1
* soc/intel/cannonlake: Increase bootblock sizeDuncan Laurie2018-12-041-1/+1
* soc/intel/*: Make FSP header path user configurablePatrick Georgi2018-10-271-1/+1
* soc/intel: Consolidate FSP CAR setup and teardown codePraveen hodagatta pranesh2018-10-251-0/+1
* intel: Use CF9 reset (part 2)Patrick Rudolph2018-10-221-1/+0
* soc/intel/cannonlake: Enable HDA driver supportpraveen hodagatta pranesh2018-10-191-0/+1
* soc/intel/cannonlake: Add CNP PCH-H gpio pin definitionspraveen hodagatta pranesh2018-10-171-3/+3
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