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path: root/src/soc/intel/cannonlake/Makefile.inc
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* soc/intel/common/block: Add common chip config blockSubrata Banik2018-06-061-0/+1
* soc/intel/cannonlake: enable pch link in bootblockCaveh Jalali2018-01-251-0/+1
* mainboard/intel/cannonlake_rvp: Add support for MAX98373 speaker ampN, Harshapriya2018-01-231-0/+10
* soc/intel/cannonlake: Add audio NHLT supportLijian Zhao2018-01-231-0/+29
* soc/intel/cannonlake: Program DMI PCR settingsLijian Zhao2018-01-161-0/+1
* soc/intel/cannonlake: provide LPDDR4 memory initNick Vaccaro2018-01-071-0/+1
* soc/intel/cannonlake: Clean up UART codeAamir Bohra2017-12-091-2/+0
* soc/intel/cannonlake: Make use of Intel SPI common blockSubrata Banik2017-11-111-2/+0
* soc/intel/cannonlake: Install common i2cLijian Zhao2017-11-041-0/+4
* soc/intel/cannonlake: Use SCS common codeBora Guvendik2017-11-011-0/+1
* soc/intel/cannonlake: Add IGD Support and pre-OS display codeAbhay Kumar2017-10-191-0/+1
* soc/intel/cannonlake: Add finalize functionLijian Zhao2017-10-181-0/+1
* soc/intel/cannonlake: Fill the SMI usageLijian Zhao2017-10-031-0/+9
* soc/intel/cannonlake: Add lpc pci driverLijian Zhao2017-10-031-0/+1
* soc/intel/cannonlake: Add PMC pci driversLijian Zhao2017-09-201-0/+2
* soc/intel/cannonlake: Add ramstage uart debug supportLijian Zhao2017-09-131-0/+1
* soc/intel/cannonlake: Add common ACPI support for CNLLijian Zhao2017-09-131-0/+1
* soc/intel/cannonlake: remove duplicate uart.c from bootblockNick Vaccaro2017-09-061-1/+0
* soc/intel/cannonlake: Add Vboot/ChromeOS supportLijian Zhao2017-09-061-0/+2
* soc/intel/cannonlake: add *spi.c files to makeNick Vaccaro2017-09-011-0/+3
* soc/intel/cannonlake: add gpio files to makeNick Vaccaro2017-09-011-0/+2
* soc/intel/cannonlake: Init UPD params based on configPratik Prajapati2017-08-251-0/+1
* soc/intel/cannonlake: Add cpu.c and MP init supportPratik Prajapati2017-08-241-0/+3
* soc/intel/cannonlake: Enable common PMC code for CNLLijian Zhao2017-08-211-0/+4
* soc/intel/cannonlake: Add SPI flash controller driverLijian Zhao2017-08-171-0/+7
* soc/intel/cannonlake: Call into FSP siliconinitLijian Zhao2017-08-151-1/+2
* soc/intel/cannonlake: Add postcar stage supportLijian Zhao2017-08-151-2/+6
* soc/intel/cannonlake: Add ramstage SystemAgent supportLijian Zhao2017-08-091-0/+1
* soc/intel/cannonlake: Add memory map supportLijian Zhao2017-08-071-1/+2
* Revert "soc/intel/cannonlake: Add postcar stage support"Martin Roth2017-07-211-6/+3
* Revert "soc/intel/cannonlake: Call into FSP siliconinit"Martin Roth2017-07-211-2/+1
* soc/intel/cannonlake: Call into FSP siliconinitLijian Zhao2017-07-211-1/+2
* soc/intel/cannonlake: Add postcar stage supportLijian Zhao2017-07-211-3/+6
* soc/intel/cannonlake: Add minimal changes to call FSP MemoryinitLijian Zhao2017-07-191-0/+1
* soc/intel/cannonlake: Add microcode supportLijian Zhao2017-07-191-0/+1
* soc/intel/cannonlake: Add MakefileAndrey Petrov2017-07-131-0/+20
* soc/intel/cannonlake: Add initial dummy directoryLijian Zhao2017-06-291-0/+7