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path:
root
/
src
/
soc
/
intel
/
cannonlake
/
chip.h
Commit message (
Expand
)
Author
Age
Files
Lines
*
soc/intel/cannonlake: Use SPDX for GPL-2.0-only files
Angel Pons
2020-04-06
1
-13
/
+2
*
soc: Remove copyright notices
Patrick Georgi
2020-03-18
1
-3
/
+0
*
soc/intel/cannonlake: Set correct serirq mode
Jeremy Soller
2020-03-17
1
-0
/
+3
*
src: capitalize 'PCIe'
Elyes HAOUAS
2020-03-04
1
-1
/
+1
*
soc/intel/cannonlake: Plumb TetonGlacierMode into dt
Edward O'Callaghan
2020-02-28
1
-0
/
+3
*
soc/intel/cannonlake: Allow Audio DSP OSC qualification for low power idle
Aamir Bohra
2020-02-04
1
-0
/
+5
*
soc/intel/cannonlake: Add chip config for SATA strength
Jamie Chen
2020-01-18
1
-0
/
+5
*
soc/intel/cannonlake: Add VR config for CML
Jamie Chen
2020-01-08
1
-0
/
+9
*
soc/intel/{cnl,icl,skl,tgl}: Remove unused gpe0_en_* from chip.h
Furquan Shaikh
2019-12-12
1
-6
/
+0
*
soc/intel/cannonlake: Disable USB2 PHY Power gating
Surendranath Gurivireddy
2019-11-27
1
-0
/
+2
*
soc/intel/cannonlake: Add chip config to override CPU flex ratio
Subrata Banik
2019-11-26
1
-0
/
+13
*
soc/intel/sgx: convert SGX and PRMRR devicetree options to Kconfig
Michael Niewöhner
2019-11-04
1
-6
/
+1
*
soc/intel: Rename <intelblocks/chip.h>
Kyösti Mälkki
2019-09-29
1
-1
/
+1
*
soc/intel/cnl: Remove unnecessary FSP UPD “PchPwrOptEnable” usage
Subrata Banik
2019-09-12
1
-3
/
+0
*
soc/intel/cannonlake: Add config for sata devslp pad reset configuration
Aamir Bohra
2019-09-12
1
-0
/
+10
*
soc/intel/cannonlake: Add config to disable display audio codec
Aamir Bohra
2019-08-26
1
-0
/
+1
*
soc/intel/cnl: Add provision to configure SD controller write protect pin
Aamir Bohra
2019-08-20
1
-0
/
+2
*
soc/intel/cannonlake: fix use of legacy 8254 timer
Matt DeVillier
2019-06-28
1
-2
/
+0
*
soc/intel/cannonlake: Rename SOC_INTEL_COMMON_CANNONLAKE_BASE
Arthur Heymans
2019-06-21
1
-1
/
+1
*
soc/intel/cannonlake: Make use of gpio_pm_configure()
Subrata Banik
2019-05-20
1
-0
/
+19
*
soc/intel/cnl: Enable VT-d
John Zhao
2019-05-11
1
-3
/
+0
*
soc/intel/cannonlake: Fix pcie clock number
Lijian Zhao
2019-05-09
1
-2
/
+2
*
mb/google/sarien: Add SMBIOS type 9 fields
Lijian Zhao
2019-05-07
1
-0
/
+1
*
mb/google/sarien: Disable S5 wake on LAN by default
Eric Lai
2019-05-01
1
-0
/
+4
*
soc/intel/cannonlake: Enable PlatformDebugConsent by Kconfig
Kane Chen
2019-04-23
1
-9
/
+0
*
soc/intel/cannonlake: Configure Vmx support using Kconfig
Ronak Kanabar
2019-04-16
1
-1
/
+0
*
soc/intel/cannonlake: Add FSP UPD to unlock GPIO pads in devicetree
Krishna Prasad Bhat
2019-04-01
1
-0
/
+3
*
soc/intel/cannonlake: Configure voltage margining policies
Krzysztof Sywula
2019-03-27
1
-0
/
+9
*
soc/intel/cannonlake: Assign FSP UPDs for HPD and Data/CLK of DDI ports
Krishna Prasad Bhat
2019-03-21
1
-0
/
+15
*
soc/intel/cannonlake: Add required FSP UPD changes for CML
Subrata Banik
2019-03-16
1
-2
/
+24
*
coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)
Julius Werner
2019-03-08
1
-2
/
+2
*
soc/intel/cannonlake: Add support for setting FSP-S PcieRpHotPlug from device...
Jeremy Soller
2019-02-22
1
-0
/
+2
*
src/soc/intel/cannonlake: Add PsysPmax setting
Gaggery Tsai
2019-02-21
1
-0
/
+2
*
soc/intel/cannonlake: Add Whiskeylake SoC kconfig
Subrata Banik
2019-02-07
1
-3
/
+1
*
src/soc/intel/cnl/chip.h: Fix preprocessor condition
Angel Pons
2019-01-28
1
-5
/
+5
*
soc/intel/cannonlake: Change in SaGv options
Ronak Kanabar
2019-01-17
1
-1
/
+7
*
soc/intel/cannonlake: Add processor power limits control support
Sumeet Pawnikar
2019-01-16
1
-0
/
+14
*
soc/intel/cannonlake: Add FSP UPD for minimum assertion width
Duncan Laurie
2019-01-08
1
-0
/
+37
*
soc/intel/cannonlake: SATA and DMI power optimize
Lijian Zhao
2018-12-19
1
-0
/
+6
*
soc/intel/cannonlake: Auto turn on HDA controller
Lijian Zhao
2018-12-19
1
-1
/
+0
*
soc/intel/cannonlake: Declare SATA Mode clear
Lijian Zhao
2018-12-19
1
-1
/
+4
*
soc/intel/cannonlake: Add Acoustic features
Lijian Zhao
2018-12-19
1
-0
/
+31
*
soc/intel/cannonlake: Add options for pcie ltr
Lijian Zhao
2018-11-17
1
-0
/
+2
*
soc/intel/cannonlake: Make static IRQ mapping for PIC mode
Subrata Banik
2018-11-15
1
-11
/
+0
*
soc/intel/cannonlake: Remove SmbusEnable
Duncan Laurie
2018-11-13
1
-3
/
+0
*
mb/{intel/google}: Move CNVi ASL entry from static DSDT to dynamic SSDT gener...
Subrata Banik
2018-11-07
1
-0
/
+1
*
soc/intel/cannonlake: Add CNP PCH-H gpio pin definitions
praveen hodagatta pranesh
2018-10-17
1
-1
/
+7
*
soc/intel/cannonlake: Update UPD from device switch
Lijian Zhao
2018-09-28
1
-9
/
+1
*
src/soc: Fix typo
Elyes HAOUAS
2018-08-09
1
-1
/
+1
*
soc/intel/common/block/cpu: Add option to skip coreboot AP init
Subrata Banik
2018-06-22
1
-6
/
+0
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