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path: root/src/soc/intel/icelake/Kconfig
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* soc/intel/icelake: Remove FSP-T option in KconfigArthur Heymans2019-11-121-26/+2
* drivers/intel/fsp2_0: move common cbmem_top_chipset to fsp driverMichael Niewöhner2019-11-111-1/+0
* soc/intel/common/sa: Remove EBDA dependencyArthur Heymans2019-11-101-1/+1
* soc/intel/icelake: Set FSP_TEMP_RAM_STACK unconditionallySubrata Banik2019-11-061-1/+0
* soc/intel/icelake: Set DCACHE_BSP_STACK_SIZE default ~129KiB unconditionallySubrata Banik2019-11-041-2/+1
* cpu/x86/tsc: Flip and rename TSC_CONSTANT_RATE to UNKNOWN_TSC_RATEKyösti Mälkki2019-11-031-1/+0
* soc/intel/common/pch: move EBDA Kconfig to soc levelMichael Niewöhner2019-11-021-0/+1
* soc/intel/{cnl, icl}: Update the DCACHE_BSP_STACK_SIZE to 129KiBV Sowmya2019-10-201-2/+3
* intel/fsp2_0: Add help text for FSP_TEMP_RAM_SIZE KconfigSubrata Banik2019-09-111-0/+9
* arch/x86: Flip option NO_CAR_GLOBAL_MIGRATIONKyösti Mälkki2019-08-111-1/+0
* arch/x86: Enable POSTCAR_CONSOLE by defaultKyösti Mälkki2019-08-111-1/+0
* lib/stage_cache: Refactor Kconfig optionsKyösti Mälkki2019-08-081-1/+0
* soc/intel/common/pch: Move thermal kconfig selection into common/pchSubrata Banik2019-08-021-1/+0
* soc/intel/icelake: Make use of common thermal code for ICLSubrata Banik2019-08-021-0/+1
* soc/intel/icelake: Add ENABLE_DISPLAY_OVER_EXT_PCIE_GFX kconfigSubrata Banik2019-07-251-0/+11
* soc/intel/{cnl,icl}: Always use CAR NEM enhanced by defaultAngel Pons2019-07-161-2/+1
* arch/x86: Flip HAVE_MONOTONIC_TIMER defaultKyösti Mälkki2019-07-091-1/+0
* cpu/x86: Flip SMM_TSEG defaultKyösti Mälkki2019-07-091-1/+0
* soc/intel/{cml, whl}: Add option to skip HECI disable in SMMSubrata Banik2019-06-131-0/+1
* soc/intel: Replace UART_BASE() and friends with a KconfigNico Huber2019-06-031-0/+5
* soc/intel/icelake: Select FSP_M_XIPSubrata Banik2019-05-021-0/+1
* vboot: refactor OPROM codeJoel Kitching2019-04-301-1/+1
* soc/intel/icelake: Enable support for FSP 2.1 specificationSubrata Banik2019-03-191-2/+1
* Untangle CBFS microcode updatesNico Huber2019-01-101-0/+1
* soc/intel: Clean mess around UART_DEBUGNico Huber2019-01-091-17/+0
* soc/intel/icelake: Increase bootblock sizeSubrata Banik2019-01-081-1/+1
* soc/intel/icelake: Create macros for FSP consumptionSubrata Banik2018-11-221-0/+8
* soc/intel/icelake: Allow coreboot to reserve stack for fspAamir Bohra2018-11-021-0/+2
* soc/intel/*: Make FSP header path user configurablePatrick Georgi2018-10-271-1/+1
* soc/intel/icelake: Do initial SoC commitAamir Bohra2018-10-261-0/+211
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