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* soc/intel/alderlake: Allow using FSP repo for all RPL-S platformsMichał Żygowski2023-11-101-1/+1
* soc/alderlake: Fix order of defaults in FSP_HEADER_PATHMichał Żygowski2023-11-101-1/+1
* soc/intel/meteorlake: Set DTT PCI device IRQ to INT_A/PIRQ_AJeremy Compostella2023-11-101-1/+3
* device/Kconfig: rename AZALIA_PLUGIN_SUPPORT to AZALIA_HDA_CODEC_SUPPORTFelix Held2023-11-102-2/+2
* Allow to build romstage sources inside the bootblockArthur Heymans2023-11-091-1/+1
* Revert "Kconfig: Bring HEAP_SIZE to a common, large value"Patrick Georgi2023-11-0712-0/+50
* soc/intel/meteorlake: Consolidate settings for enabling tracehubKane Chen2023-11-042-0/+16
* soc/intel/alderlake: Add missing min sleep state for DPTF deviceMatt DeVillier2023-11-041-0/+1
* soc/intel/braswell/Kconfig: Set HPET_MIN_TICKSMatt DeVillier2023-11-031-0/+3
* soc/intel/braswell: Unify DPTF enablementMatt DeVillier2023-11-033-7/+2
* soc/intel/cannonlake: Add missing entry to soc_acpi_name()Matt DeVillier2023-11-031-0/+1
* soc/intel/cannonlake: Add missing min sleep state for thermal deviceMatt DeVillier2023-11-031-0/+1
* soc/intel/cmn/gfx: Join MBUS while FSP-S performs GFX initSubrata Banik2023-11-031-21/+32
* Revert "soc/intel/{tigerlake,meteorlake}: Check ITBT FW version"Ravi Sarawadi2023-11-024-20/+2
* drivers/intel/gma/opregion: Use CBFS cache to load VBTJeremy Compostella2023-11-024-16/+0
* soc/intel/*: Correct ACPI device name for eMMCMatt DeVillier2023-11-024-4/+4
* soc/intel/cmn/gfx: Fix GFX modeset issue with dual-displaySubrata Banik2023-11-011-11/+42
* soc/intel/meteorlake: Adjust Power State Current 2 thresholdJeremy Compostella2023-11-013-0/+34
* soc/intel/meteorlake: Add power limits for 4+8 28W SOC SKUCurtis Chen2023-11-012-3/+4
* soc/intel/cannonlake: Implement SoC sleep state arrayMatt DeVillier2023-10-312-0/+71
* soc/intel/tigerlake: Implement SoC sleep state arrayMatt DeVillier2023-10-312-0/+68
* soc/intel/meteorlake: Expose In-Band ECC UPD config to mainboardMarx Wang2023-10-282-0/+42
* soc/intel/meteoerlake: Add power limits for 2+4 15W SOC SKUKane Chen2023-10-282-3/+4
* soc/intel/cse: remove cbfs_unverified_area_map() API in cse_liteRizwan Qureshi2023-10-272-69/+7
* soc/intel/cannonlake: Add/use chipset devicetreesMatt DeVillier2023-10-263-0/+266
* soc/intel/apollolake: Select USE_LEGACY_8254_TIMERSean Rhodes2023-10-261-0/+3
* cbmem.h: Drop cbmem_possible_online in favor of ENV_HAS_CBMEMArthur Heymans2023-10-251-1/+1
* soc/intel/meteorlake: Add PsysPmax configurationJakub Czapiga2023-10-242-0/+8
* soc/intel/cannonlake: Add ACPI devices for FSPI, SRAM, HEC1Matt DeVillier2023-10-232-0/+16
* soc/intel/tigerlake: Add ACPI devices for FSPI, SRAM, HEC1Matt DeVillier2023-10-232-0/+16
* soc/intel/common/acpi: Don't generate LPI constraints for disabled/hidden dev...Matt DeVillier2023-10-231-0/+4
* soc/intel/common/pcie: Disable removed RPs when updating devicetreeMatt DeVillier2023-10-231-1/+2
* soc/intel/meteorlake: Set build time physical address reserved bitsJeremy Compostella2023-10-201-0/+3
* x86: Add pre-memory stages CBFS cache scratchpad supportJeremy Compostella2023-10-202-0/+6
* device/device.h: Rename pci_domain_scan_busArthur Heymans2023-10-2012-12/+12
* soc/intel/cannonlake: Support Comet Lake v1 and v2 in one buildJonathon Hall2023-10-203-2/+64
* soc/intel/meteorlake: Update TBT PCIe Reg Map offsets for QSRavi Sarawadi2023-10-191-4/+41
* soc/intel: Improve CONFIG_ACPI_SOC_INTEL_SLP_S0_FREQ_HZ useJeremy Compostella2023-10-193-3/+13
* soc/intel/alderlake: Fix incorrect microcode commentsMichał Żygowski2023-10-191-2/+2
* vc/intel/raptorlake: Use FSP v4301.01 headers for GoogleNick Vaccaro2023-10-191-1/+0
* soc/intel/mtl: Set slp-s0 counter frequencySukumar Ghorai2023-10-181-0/+6
* soc/intel/{adl, mtl}: Avoid redundant display init by joining to MBUSSubrata Banik2023-10-182-0/+2
* soc/intel/cmn/graphics: Implement API for IGD to join the MBUSSubrata Banik2023-10-182-1/+41
* soc/intel/alderlake: Add config for Client RPL FSP supportBora Guvendik2023-10-161-2/+4
* soc/intel/cmn/gfx: Detect dual display (eDP + HDMI)Subrata Banik2023-10-161-6/+25
* soc/intel/common/block/acpi/northbridge.asl: Reserve SBREG BARMichał Żygowski2023-10-161-0/+22
* soc/intel/xeon_sp/spr: Add SATA controllers 1 and 2 to devicetreeNaresh Solanki2023-10-131-1/+3
* soc/intel/cse: Remove unused header fileKrishna Prasad Bhat2023-10-131-1/+0
* Kconfig: Bring HEAP_SIZE to a common, large valuePatrick Georgi2023-10-1112-50/+0
* soc/intel/meteorlake: Reserve IOE P2SB MMIO correctlyKane Chen2023-10-091-2/+2
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