coreboot.git - Coreboot firmware sources

	Commit message (Collapse)	Author	Age	Files	Lines
*	soc/mediatek/mt8192: Add PLL and clock init support	Weiyi Lu	2020-08-12	1	-0/+419
	Add PLL and clock init code. TEST=Boots correctly on MT8192EVB. Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> Change-Id: Ia49342c058577e8e107b7e56c867bf21532e40d2 Reviewed-on: https://review.coreboot.org/c/coreboot/+/43958 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Hung-Te Lin <hungte@chromium.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>