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* soc/mediatek: Use SPDX for GPL-2.0-only filesAngel Pons2020-04-05129-1677/+258
* security/vboot: Decouple measured boot from verified bootBill XIE2020-03-312-2/+2
* soc/mediatek/mt8183: Fix wrong setting of DRS configHuayang Duan2020-03-181-3/+4
* soc/mediatek/mt8183: Improve the AC timing of DRAMCHuayang Duan2020-03-181-6/+16
* soc: Remove copyright noticesPatrick Georgi2020-03-18132-132/+0
* vboot: remove extraneous vboot_recovery_mode_memory_retrainJoel Kitching2020-03-121-1/+2
* soc/mediatek/mt8183: Improve the DRAMC runtime config flowHuayang Duan2020-03-063-123/+109
* soc/mediatek/mt8183: Do TX tracking for DRAM DVFS featureHuayang Duan2020-03-065-14/+776
* soc/mediatek/mt8183: Correct EMI bandwidth threshold for DVFS switchHuayang Duan2020-03-061-2/+4
* treewide: capitalize 'USB'Elyes HAOUAS2020-02-261-1/+1
* soc/mediatek/mt8183: Fix programming error of DRAMC settingHuayang Duan2020-02-251-3/+3
* soc/mediatek: Fix typos in commentsElyes HAOUAS2020-02-257-11/+11
* soc/mediatek: dsi: Correct bits_per_pixel for MIPI_DSI_FMT_RGB666Yu-Ping Wu2020-02-171-1/+1
* soc/mediatek: dsi: reduce the hbp and hfp for phy timingJitao Shi2020-02-171-44/+48
* soc/mediatek: dsi: Increase pcw precisionYu-Ping Wu2020-02-174-39/+40
* drivers/spi/spi_flash: remove spi flash namesAaron Durbin2020-01-281-1/+0
* soc/mediatek/mt8183: Restore vcore after DRAM calibrationHuayang Duan2020-01-101-1/+11
* soc/mediatek/mt8183: Use DDR clock to compute Tx delay cellHuayang Duan2019-12-201-6/+14
* src: Replace min/max() with MIN/MAX()Elyes HAOUAS2019-12-202-4/+4
* soc/{amd,cavium,mediatek,sifive}: Remove unused <stdlib.h>Elyes HAOUAS2019-12-195-5/+0
* src: Remove unneeded 'include <delay.h>'Elyes HAOUAS2019-12-191-1/+0
* soc/mediatek/mt8183: skip fast calibration for high frequency of TX RX windowHuayang Duan2019-12-121-4/+5
* Change all clrsetbits_leXX() to clrsetbitsXX()Julius Werner2019-12-0430-1150/+1149
* soc/mediatek/mt8183: disable BBLPM of DCXO coreWeiyi Lu2019-11-261-2/+2
* include: Make stdbool.h a separate fileJulius Werner2019-11-181-0/+2
* soc/mediatek/mt8183: Get more space for PreRAM memconsoleHung-Te Lin2019-11-161-6/+6
* lib/fmap: Add optional pre-RAM cacheJulius Werner2019-11-142-2/+4
* soc/mediatek: Add missing '#include <console/console.h>'Elyes HAOUAS2019-11-112-0/+2
* arch/arm64: Pass cbmem_top to ramstage via calling argumentArthur Heymans2019-11-032-2/+2
* lib/cbmem_top: Add a common cbmem_top implementationArthur Heymans2019-11-011-1/+1
* soc/{mediatek,sifive}: Remove unused 'include <arch/barrier.h>'Elyes HAOUAS2019-11-012-2/+0
* soc/mediatek/mt8183: Disable DRAM DVFS in recovery modeYu-Ping Wu2019-10-313-2/+7
* soc/mediatek/mt8183: Pass MR values as function argumentsYu-Ping Wu2019-10-286-49/+58
* soc/mediatek/mt8183: Add udelay after setting voltagesYu-Ping Wu2019-10-241-0/+2
* soc/mediatek/mt8183: Improve DRAM calibration logsYu-Ping Wu2019-10-244-24/+19
* soc/mediatek/mt8183: Correct continuation line indentYu-Ping Wu2019-10-241-4/+4
* soc/mediatek/mt8183: Force retraining memory if requestedHung-Te Lin2019-10-241-1/+2
* soc/mediatek/mt8183: Fix incorrect usage of sizeofYu-Ping Wu2019-10-231-4/+4
* soc/mediatek/mt8183: add dphy reset after setting lanes numberJitao Shi2019-10-232-0/+9
* soc/mediatek/mt8183: fine tune the phy timingJitao Shi2019-10-231-2/+2
* src/{device,drivers,mb,nb,soc,sb}: Remove unused 'include <console/console.h>'Elyes HAOUAS2019-10-212-2/+0
* soc/mediatek/mt8183: Force DRAM retraining if hotkey pressedYu-Ping Wu2019-10-211-0/+6
* soc/mediatek/mt8183: Skip fast calibration in recovery modeYu-Ping Wu2019-10-211-8/+25
* src: Remove unused 'include <string.h>'Elyes HAOUAS2019-10-203-3/+0
* soc/mediatek/mt8183: Compress calibration blob with LZ4Hung-Te Lin2019-10-181-1/+1
* soc/mediatek/mt8183: Pass impedance data as a function argumentYu-Ping Wu2019-10-186-37/+52
* soc/mediatek/mt8183: Run calibration with multiple frequencies for DVFS switchHuayang Duan2019-10-185-26/+207
* soc/mediatek/mt8183: Adjust DRAM voltages for each DRAM frequencyHuayang Duan2019-10-181-0/+28
* soc/mediatek/mt8183: Allow modifying vddq voltageHsin-Hsiung Wang2019-10-182-0/+108
* soc/mediatek/mt8183: Allow modifying vdram1 voltageHsin-Hsiung Wang2019-10-182-0/+26
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