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* src/soc to src/superio: Fix spelling errorsMartin Roth2021-10-051-3/+3
* memlayout: Store region sizes as separate symbolsJulius Werner2021-02-191-2/+2
* cbfs: Enable CBFS mcache on most chipsetsJulius Werner2020-12-021-2/+3
* include/console/uart: make index parameter unsignedFelix Held2020-09-121-1/+1
* soc/sifive: Drop unneeded empty linesElyes HAOUAS2020-08-245-18/+0
* treewide: Add Kconfig variable MEMLAYOUT_LD_FILEFurquan Shaikh2020-06-132-0/+4
* soc/sifive/fu540: Add chip_operations stubKyösti Mälkki2020-05-282-0/+8
* src: Remove leading blank lines from SPDX headerElyes HAOUAS2020-05-181-2/+0
* src: Remove unused '#include <stddef.h>'Elyes HAOUAS2020-05-132-2/+0
* treewide: Remove "this file is part of" linesPatrick Georgi2020-05-1117-17/+0
* soc/sifive/fu540: Add missing '#include <commonlib/bsd/helpers.h>'Elyes HAOUAS2020-05-111-0/+1
* src/: Replace GPL boilerplate with SPDX headersPatrick Georgi2020-05-091-8/+1
* {security,soc}/*/Kconfig: Replace GPLv2 long form headers with SPDX headerElyes HAOUAS2020-05-081-10/+1
* soc/sifive: Use SPDX for GPL-2.0-only filesAngel Pons2020-04-0515-195/+30
* soc: Remove copyright noticesPatrick Georgi2020-03-1821-22/+0
* soc/{samsung,sifive}: Fix typosElyes HAOUAS2020-02-241-1/+1
* src: Replace min/max() with MIN/MAX()Elyes HAOUAS2019-12-201-2/+2
* soc/{amd,cavium,mediatek,sifive}: Remove unused <stdlib.h>Elyes HAOUAS2019-12-191-1/+0
* fmap: Make FMAP_CACHE mandatory if it is configured inJulius Werner2019-12-111-0/+1
* Change all clrsetbits_leXX() to clrsetbitsXX()Julius Werner2019-12-042-8/+8
* soc/sifive/fu540: Support booting from SD cardXiang Wang2019-11-141-0/+2
* lib/cbmem_top: Add a common cbmem_top implementationArthur Heymans2019-11-011-1/+1
* soc/{mediatek,sifive}: Remove unused 'include <arch/barrier.h>'Elyes HAOUAS2019-11-011-1/+0
* soc/sifive/fu540: test and fix code of fu540 spiXiang Wang2019-10-161-2/+27
* soc/sifive/fu540: add code for spi and map flash to memory spacesXiang Wang2019-08-125-28/+582
* soc/sifive/fu540: Add opensbi supportPatrick Rudolph2019-08-052-2/+11
* arch/non-x86: Flip HAVE_MONOTONIC_TIMER defaultKyösti Mälkki2019-07-091-2/+0
* src/mb/sifive/hifive-unleashed: initialize Gigabit Ethernet ControllerXiang Wang2019-03-181-0/+35
* device/mmio.h: Add include file for MMIO opsKyösti Mälkki2019-03-044-4/+4
* riscv: ARCH_RISCV_RV{32,64} selects ARCH_RISCVRonald G. Minnich2019-01-241-1/+0
* riscv: create Kconfig architecture features for new partsRonald G. Minnich2019-01-171-0/+4
* console: Change BOOTBLOCK_CONSOLE default to `y`Nico Huber2019-01-141-1/+0
* riscv: fix non-SMP supportPhilipp Hug2018-12-071-1/+1
* soc/sifive/fu540: Add helper function to get tlclk frequencyJonathan Neuschäfer2018-12-053-5/+13
* soc/sifive/fu540: Load PLL settings from a structJonathan Neuschäfer2018-12-041-84/+72
* soc/sifive/fu540: Simplify UART refclk calculationJonathan Neuschäfer2018-12-033-5/+4
* riscv: add support smp_pause / smp_resumeXiang Wang2018-11-054-27/+11
* sifive/fu540: correct cbmem supportPhilipp Hug2018-10-302-2/+7
* soc/sifive/fu540: Document #if ENV_ROMSTAGE lineJonathan Neuschäfer2018-09-261-3/+2
* soc/sifive/fu540: Remove PLL parameters from sdram.cJonathan Neuschäfer2018-09-261-2/+0
* sifive/hifive-unleashed: enable CBMEM supportPhilipp Hug2018-09-151-0/+1
* soc/sifive: move ram_resource to mainboardPhilipp Hug2018-09-151-20/+0
* soc/sifive/fu540: Implement uart_platform_refclk for UART divisor calculationPhilipp Hug2018-09-141-1/+8
* soc/sifive/fu540: Initialize SDRAMPhilipp Hug2018-09-143-1/+240
* soc/sifive/fu540: Switch clock to 1GHz in romstagePhilipp Hug2018-09-142-16/+46
* soc/sifive/fu540: create ram_resource with actual memory sizePhilipp Hug2018-09-141-0/+20
* arch/riscv: provide a monotonic timerPhilipp Hug2018-09-141-0/+4
* soc/sifive/fu540: add SiFive supplied header files for SDRAM initializationPhilipp Hug2018-09-143-0/+1664
* soc/sifive/fu540: Get SDRAM controller out of resetPhilipp Hug2018-09-131-0/+34
* soc/sifive/fu540: Update clock settings according SiFive bootloaderPhilipp Hug2018-09-131-8/+30
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