| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | soc/ucb/riscv: Add chip_operations stub | Kyösti Mälkki | 2020-05-28 | 1 | -0/+2 |
| * | mb/emulation/qemu-riscv: Implement ipi using clint to enable smp in qemu/spike. | Philipp Hug | 2019-12-06 | 1 | -4/+0 |
| * | mb/emulation/spike-riscv: Implement mtime_init | Jonathan Neuschäfer | 2018-12-05 | 1 | -2/+0 |
| * | riscv: add support smp_pause / smp_resume | Xiang Wang | 2018-11-05 | 1 | -0/+5 |
| * | soc/sifive/fu540: Makefile: include mtime_init in ramstage | Philipp Hug | 2018-09-10 | 1 | -0/+1 |
| * | riscv: update mtime initialization | Xiang Wang | 2018-09-10 | 1 | -0/+1 |
| * | kbuild: automatically include SOCs | Stefan Reinauer | 2015-04-29 | 1 | -1/+4 |
| * | Add UCB RISCV support for architecture, soc, and emulation mainboard.. | Ronald G. Minnich | 2014-12-01 | 1 | -0/+3 |
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index : coreboot.git | |
| Coreboot firmware sources | coreboot |
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