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* soc/intel/common: Remove unused Kconfig SKIP_GRAPHICS_ENABLINGRonak Kanabar2020-04-061-8/+0
* soc/intel/jasperlake: Remove DDI A lane programmingRonak Kanabar2020-04-061-19/+0
* fsp2_0: Gather Kconfig declarationsNico Huber2020-04-058-27/+0
* soc/intel/apollolake: Don't select repo option for Gemini LakeNico Huber2020-04-051-1/+1
* soc/intel/tigerlake: Replace Reserved9 usage with DisableDimmCh# UPD.Srinidhi N Kaushik2020-04-051-1/+9
* soc/mediatek: Use SPDX for GPL-2.0-only filesAngel Pons2020-04-05129-1677/+258
* soc/qualcomm: Use SPDX for GPL-2.0-only filesAngel Pons2020-04-0525-325/+50
* soc/sifive: Use SPDX for GPL-2.0-only filesAngel Pons2020-04-0515-195/+30
* soc/ucb: Use SPDX for GPL-2.0-only filesAngel Pons2020-04-051-12/+2
* soc/amd: Use SPDX for GPL-2.0-only filesAngel Pons2020-04-05125-1618/+250
* Drop explicit NULL initializations from `device_operations`Elyes HAOUAS2020-04-0532-54/+0
* soc/intel/xeon_sp/cpx: Add multi-core initAndrey Petrov2020-04-044-8/+100
* soc/intel/skylake: vr_config: enable PSI3 and PSI4 by defaultMichael Niewöhner2020-04-031-9/+9
* soc/intel/braswell: add ACPI backlight supportMatt DeVillier2020-04-022-0/+12
* soc/intel/baytrail: add ACPI backlight supportMatt DeVillier2020-04-022-0/+11
* soc/intel/broadwell: add ACPI backlight supportMatt DeVillier2020-04-022-5/+16
* Trim `.acpi_fill_ssdt_generator` and `.acpi_inject_dsdt_generator`Nico Huber2020-04-0227-54/+54
* soc/intel/tigerlake: Add macros and SPD information for DDR4Furquan Shaikh2020-04-021-0/+16
* soc/intel/tigerlake: Reorganize memory initialization supportFurquan Shaikh2020-04-022-139/+282
* soc/amd/common/psp: Move definitions into a private fileMarshall Dawson2020-04-023-62/+75
* soc/amd/common/psp: Move early init to socFelix Held2020-04-027-126/+75
* soc/amd/common/psp: Consolidate FW blob load functionsMarshall Dawson2020-04-024-35/+39
* soc/amd/common/psp: Make common function to print statusMarshall Dawson2020-04-021-18/+18
* soc/intel/tigerlake: Remove Jasper Lake SoC referencesAamir Bohra2020-04-0137-2926/+977
* soc/intel/{tgl,jsl}: Use soc/intel/jasperlake for Jasper Lake SoCAamir Bohra2020-04-015-20/+8
* soc/intel/common/block: Add missing includeRizwan Qureshi2020-03-311-0/+1
* security/vboot: relocate and rename vboot_platform_is_resuming()Bill XIE2020-03-315-13/+17
* soc/intel/common/block/cse: Add check for CSE enabledWim Vervoorn2020-03-311-0/+4
* security/vboot: Decouple measured boot from verified bootBill XIE2020-03-316-6/+6
* intel/fsp2_0: Make FSP_USE_REPO a SoC opt-inJohanna Schander2020-03-306-0/+13
* soc/intel/{icelake, tigerlake}: Remove DDI A lane programmingRonak Kanabar2020-03-302-38/+0
* soc/amd/picasso: Add helper functions for finding SOC typeMartin Roth2020-03-303-0/+43
* soc/intel/tigerlake: Configure IOM_TYPEC_SW_CONFIGURATION_3Brandon Breitenstein2020-03-302-0/+10
* soc/amd/picasso: Add and use CPUID defines for Picasso and Raven2Martin Roth2020-03-292-2/+5
* soc/amd/picasso: Add Kconfig option for chip footprintFelix Held2020-03-291-0/+10
* soc/intel/skylake: Hook up GMA ACPI brightness controlsMatt DeVillier2020-03-282-0/+12
* soc/intel/common: Hook up GMA ACPI brightness controlsMatt DeVillier2020-03-282-7/+27
* soc/intel/jasperlake: Remove Tiger Lake SoC code from Jasper LakeAamir Bohra2020-03-2866-3250/+939
* soc/intel/jasperlake: Add Jasper Lake SoC supportAamir Bohra2020-03-2893-0/+10462
* soc/intel/xeon_sp: Add basic Cooperlake-SP supportAndrey Petrov2020-03-2615-0/+765
* soc/intel/xeon_sp: Configure P2SB BAR in bootblockAndrey Petrov2020-03-261-0/+6
* soc/intel/xeon_sp: Refactor code to allow for additional CPUs typesAndrey Petrov2020-03-2632-186/+265
* create stdio.h and stdarg.h for {,v}snprintfJoel Kitching2020-03-251-0/+1
* amd/common/acpi: move thermal zone to common locationMichał Żygowski2020-03-251-0/+92
* soc/intel/cometlake: Use IntelFSP repoFelix Singer2020-03-251-1/+2
* acpi: correct the processor devices scopeMichał Żygowski2020-03-257-34/+51
* soc/intel/xeon_sp: Enable LPC generic IO decode rangeJohnny Lin2020-03-255-0/+33
* soc/intel/tigerlake: Configure HyperthreadingWonkyu Kim2020-03-252-2/+5
* intel/broadwell: Correct backlight-PWM dividerNico Huber2020-03-241-2/+2
* soc/intel/tigerlake: Update DCACHE_BSP_STACK_SIZETim Wawrzynczak2020-03-231-2/+4
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