| Commit message (Expand) | Author | Age | Files | Lines |
* | sb/amd/hudson: Fix typo in GEC firmware name | Marshall Dawson | 2019-11-19 | 1 | -1/+1 |
* | sb/intel/bd82x6x: Handle enabling of GbE | Nico Huber | 2019-11-18 | 2 | -2/+28 |
* | nb/intel/sandybridge: Move to C_ENVIRONMENT_BOOTBLOCK | Arthur Heymans | 2019-11-18 | 3 | -15/+8 |
* | sb/intel/bd82x6x: Make the pch_enable_lpc hook optional | Arthur Heymans | 2019-11-18 | 2 | -1/+8 |
* | nb/intel/sandybridge: Make the mainboard_rcba_config hook optional | Arthur Heymans | 2019-11-18 | 1 | -1/+3 |
* | */Makefile: Always build enable_usbdebug.c | Arthur Heymans | 2019-11-18 | 6 | -18/+18 |
* | sb/intel/common: Properly guard USB debug | Arthur Heymans | 2019-11-18 | 10 | -9/+15 |
* | sb/intel/i82801gx: Only include SPI code with SPI boot devices | Arthur Heymans | 2019-11-16 | 2 | -2/+3 |
* | nb/intel/x4x: Move to C_ENVIRONMENT_BOOTBLOCK | Arthur Heymans | 2019-11-15 | 5 | -10/+10 |
* | nb/intel/i945: Initialize console in bootblock | Arthur Heymans | 2019-11-15 | 1 | -0/+1 |
* | nb/intel/i945: Move to C_ENVIRONMENT_BOOTBLOCK | Arthur Heymans | 2019-11-15 | 4 | -55/+10 |
* | sb/intel/i82801gx: Don't setup CIR when the northbridge is x4x | Arthur Heymans | 2019-11-14 | 1 | -1/+4 |
* | sb/intel/i82801jx: Move early sb init to a common place | Arthur Heymans | 2019-11-14 | 2 | -0/+62 |
* | sb/intel/i82801gx: Add common early code | Arthur Heymans | 2019-11-14 | 2 | -0/+54 |
* | sb/intel/i82801gx,ix,jx: Move HAVE_SMI_HANDLER conditional | Kyösti Mälkki | 2019-11-13 | 3 | -27/+30 |
* | sb/intel/i82801dx,ix: Replace SMM_ASEG conditional | Kyösti Mälkki | 2019-11-13 | 2 | -2/+2 |
* | sb/intel: Remove ENABLE_ACPI_MODE_IN_COREBOOT | Kyösti Mälkki | 2019-11-13 | 6 | -48/+0 |
* | sb/intel/i82801jx: Enable upper 128bytes of CMOS | Arthur Heymans | 2019-11-13 | 1 | -0/+3 |
* | sb/intel/i82801gx: Add a function to set up BAR | Arthur Heymans | 2019-11-13 | 3 | -3/+14 |
* | intel/82801dx,ix: Rename SMM_ASEG functions | Kyösti Mälkki | 2019-11-13 | 2 | -8/+8 |
* | sb/intel/i82801jx: Add common code for LPC decode | Arthur Heymans | 2019-11-12 | 4 | -0/+62 |
* | sb/intel/i82801gx: Add common LPC decode code | Arthur Heymans | 2019-11-12 | 5 | -0/+63 |
* | sb/intel/common: Remove the SOUTHBRIDGE_INTEL_COMMON Kconfig symbol | Arthur Heymans | 2019-11-10 | 11 | -20/+0 |
* | sb/intel/common: Make COMMON_RESET optional | Arthur Heymans | 2019-11-10 | 10 | -2/+10 |
* | sb/intel/common: Make linking rtc.c conditional | Arthur Heymans | 2019-11-10 | 11 | -1/+14 |
* | arch/x86: Replace some __SMM__ guards | Kyösti Mälkki | 2019-11-09 | 10 | -72/+61 |
* | ELOG: Avoid some preprocessor use | Kyösti Mälkki | 2019-11-09 | 6 | -17/+7 |
* | ELOG: Introduce elog_gsmi variants | Kyösti Mälkki | 2019-11-09 | 2 | -22/+8 |
* | sb,soc/intel: Reduce preprocessor use with ME debugging | Kyösti Mälkki | 2019-11-08 | 6 | -71/+56 |
* | arch/x86: Drop some __SMM__ guards | Kyösti Mälkki | 2019-11-08 | 6 | -12/+2 |
* | sb/intel: Use defined CONFIG_HPET_ADDRESS | Elyes HAOUAS | 2019-11-04 | 6 | -24/+24 |
* | sb/intel/lynxpoint: Use sb/intel/common/platform.asl | Arthur Heymans | 2019-11-04 | 1 | -53/+0 |
* | mb/*/*{bd82x6x/ibexpreak}: Use sb/intel/common/acpi/platform.asl | Arthur Heymans | 2019-11-04 | 1 | -53/+0 |
* | sb/intel/common/platform.asl: Remove setting unused GNVS | Arthur Heymans | 2019-11-04 | 1 | -10/+0 |
* | sb/intel/i82801jx/nvs.h: include required header | Arthur Heymans | 2019-11-04 | 1 | -0/+2 |
* | sb/intel: Move 'smbus.asl' to common place | Elyes HAOUAS | 2019-11-04 | 12 | -1186/+6 |
* | soc/intel/{IA-CPU/SOC}: Move sleepstates.asl into southbridge/intel/common/acpi | Subrata Banik | 2019-11-01 | 6 | -113/+0 |
* | sb/intel/common: Make linking pmbase.c conditional | Arthur Heymans | 2019-10-30 | 9 | -2/+16 |
* | sb/intel/common/Makefile: Use 'all' class to link files in all stages | Arthur Heymans | 2019-10-30 | 1 | -18/+4 |
* | src/southbridge: change "unsigned" to "unsigned int" | Martin Roth | 2019-10-30 | 67 | -256/+256 |
* | nb/intel/gm45: Add C_ENVIRONMENT_BOOTBLOCK support | Arthur Heymans | 2019-10-28 | 3 | -5/+10 |
* | src/southbridge: Use 'include <stdlib.h>' when appropriate | Elyes HAOUAS | 2019-10-28 | 8 | -9/+9 |
* | src: Remove unused '#include <cpu/cpu.h>' | Elyes HAOUAS | 2019-10-28 | 1 | -1/+0 |
* | sb/intel/i82801gx: Set FERR# Mux Enable only on mobile platforms | Arthur Heymans | 2019-10-22 | 1 | -3/+4 |
* | sb/intel/common/smihandler: Fix compilation on x86_64 | Patrick Rudolph | 2019-10-22 | 1 | -3/+3 |
* | src/{device,drivers,mb,nb,soc,sb}: Remove unused 'include <console/console.h>' | Elyes HAOUAS | 2019-10-21 | 3 | -3/+0 |
* | sb/lynxpoint: Fix 'dead increment' | Elyes HAOUAS | 2019-10-21 | 2 | -2/+2 |
* | mb/lenovo/x200: Add ThinkPad X301 as a variant | Bill XIE | 2019-10-20 | 1 | -0/+6 |
* | src: Remove unused include '<device/pci_ids.h>' | Elyes HAOUAS | 2019-10-18 | 4 | -4/+0 |
* | nb/intel/nehalem: use pmclib to detect S3 resume | Arthur Heymans | 2019-10-17 | 1 | -0/+1 |