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* superio/winbond/w83667hg-a: Replace LEqual(a,b) with ASL 2.0 syntaxFelix Singer2022-06-091-1/+1
| | | | | | | | | | Replace `LEqual(a, b)` with `a == b`. Change-Id: I033f73e6552746c6899e46ee4d619ab47cb3d55b Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60659 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sean Rhodes <sean@starlabs.systems>
* sio/winbond/w83627hf/acpi: Replace LNotEqual(a,b) with ASL 2.0 syntaxFelix Singer2022-06-091-1/+1
| | | | | | | | | | Replace `LNotEqual(a, b)` with `a != b`. Change-Id: I24cf4fd70e887c14006975f494be63c34f8a75e6 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60697 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sean Rhodes <sean@starlabs.systems>
* sio/winbond/w83627hf/acpi: Replace LLess(a,b) with ASL 2.0 syntaxFelix Singer2022-06-091-1/+1
| | | | | | | | | | Replace `LLess(a, b)` with `a < b`. Change-Id: I9344e34058a1dd8b951d273e53e3c229a0ec07b4 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60676 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sean Rhodes <sean@starlabs.systems>
* superio/winbond/w83627hf/acpi: Replace LEqual(a,b) with ASL 2.0 syntaxFelix Singer2022-06-091-2/+2
| | | | | | | | | | Replace `LEqual(a, b)` with `a == b`. Change-Id: I3833a3a341bd64191cc0b811ca80e96a359307a1 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60658 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sean Rhodes <sean@starlabs.systems>
* src/superio: Remove unused <acpi/acpi.h>Elyes HAOUAS2022-01-101-1/+0
| | | | | | | | | | | Found using: diff <(git grep -l '#include <acpi/acpi.h>' -- src/) <(git grep -l 'SLP_EN\|SLP_TYP_SHIFT\|SLP_TYP\|SLP_TYP_S\|ACPI_TABLE_CREATOR\|OEM_ID\|ACPI_DSDT_REV_\|acpi_device_sleep_states\|ACPI_DEVICE_SLEEP\|RSDP_SIG\|ASLC\|ACPI_NAME_BUFFER_SIZE\|COREBOOT_ACPI_ID\|acpi_tables\|acpi_rsdp\|acpi_gen_regaddr\|ACPI_ADDRESS_SPACE\|ACPI_FFIXEDHW_\|ACPI_ACCESS_SIZE_\|ACPI_REG_MSR\|ACPI_REG_UNSUPPORTED\|ACPI_HID_\|acpi_table_header\|MAX_ACPI_TABLES\|acpi_rsdt\|acpi_xsdt\|acpi_hpet\|acpi_mcfg\|acpi_tcpa\|acpi_tpm2\|acpi_mcfg_mmconfig\|acpi_hmat\|acpi_hmat_mpda\|acpi_hmat_sllbi\|acpi_hmat_msci\|acpi_srat\|ACPI_SRAT_STRUCTURE_\|acpi_srat_lapic\|acpi_srat_mem\|acpi_srat_gia\|CPI_SRAT_GIA_DEV_HANDLE_\|acpi_slit\|acpi_madt\|acpi_lpit\|acpi_lpi_flags\|acpi_lpi_desc_type\|ACPI_LPI_DESC_TYPE_\|acpi_lpi_desc_hdr\|ACPI_LPIT_CTR_FREQ_TSC\|acpi_lpi_desc_ncst\|acpi_vfct_image_hdr\|acpi_vfct\|acpi_ivrs_info\|acpi_ivrs_ivhd\|acpi_ivrs\|acpi_crat_header\|ivhd11_iommu_attr\|acpi_ivrs_ivhd_11\|dev_scope_type\|SCOPE_PCI_\|SCOPE_IOAPIC\|SCOPE_MSI_HPET\|SCOPE_ACPI_NAMESPACE_DEVICE\|dev_scope\|dmar_type\|DMAR_\|DRHD_INCLUDE_PCI_ALL\|ATC_REQUIRED\|DMA_CTRL_PLATFORM_OPT_IN_FLAG\|dmar_entry\|dmar_rmrr_entry\|dmar_atsr_entry\|dmar_rhsa_entry\|dmar_andd_entry\|dmar_satc_entry\|acpi_dmar\|acpi_apic_types\|LOCAL_APIC,\|IO_APIC\|IRQ_SOURCE_OVERRIDE\|NMI_TYPE\|LOCAL_APIC_NMI\|LAPIC_ADDRESS_\|IO_SAPIC\|LOCAL_SAPIC\|PLATFORM_IRQ_SOURCES\|LOCAL_X2APIC\|GICC\|GICD\|GIC_MSI_FRAME\|GICR\|GIC_ITS\|acpi_madt_lapic\|acpi_madt_lapic_nmi\|ACPI_MADT_LAPIC_NMI_ALL_PROCESSORS\|acpi_madt_ioapic\|acpi_madt_irqoverride\|acpi_madt_lx2apic\|acpi_madt_lx2apic_nmi\|ACPI_DBG2_PORT_\|acpi_dbg2_header\|acpi_dbg2_device\|acpi_fadt\|ACPI_FADT_\|PM_UNSPECIFIED\|PM_DESKTOP\|PM_MOBILE\|PM_WORKSTATION\|PM_ENTERPRISE_SERVER\|PM_SOHO_SERVER\|PM_APPLIANCE_PC\|PM_PERFORMANCE_SERVER\|PM_TABLET\|acpi_facs\|ACPI_FACS_\|acpi_ecdt\|acpi_hest\|acpi_hest_esd\|acpi_hest_hen\|acpi_bert\|acpi_hest_generic_data\|acpi_hest_generic_data_v300\|HEST_GENERIC_ENTRY_V300\|ACPI_GENERROR_\|acpi_generic_error_status\|GENERIC_ERR_STS_\|acpi_cstate\|acpi_sw_pstate\|acpi_xpss_sw_pstate\|acpi_tstate\|acpi_lpi_state_flags\|ACPI_LPI_STATE_\|acpi_lpi_state\|acpi_upc_type\|UPC_TYPE_\|acpi_ipmi_interface_type\|IPMI_INTERFACE_\|ACPI_IPMI_\|acpi_spmi\|ACPI_EINJ_\|ACTION_COUNT\|BEGIN_INJECT_OP\|GET_TRIGGER_ACTION_TABLE\|SET_ERROR_TYPE\|GET_ERROR_TYPE\|END_INJECT_OP\|EXECUTE_INJECT_OP\|CHECK_BUSY_STATUS\|GET_CMD_STATUS\|SET_ERROR_TYPE_WITH_ADDRESS\|TRIGGER_ERROR\|READ_REGISTER\|READ_REGISTER_VALUE\|WRITE_REGISTER\|WRITE_REGISTER_VALUE\|NO_OP\|acpi_gen_regaddr1\|acpi_einj_action_table\|acpi_injection_header\|acpi_einj_trigger_table\|set_error_type\|EINJ_PARAM_NUM\|acpi_einj_smi\|EINJ_DEF_TRIGGER_PORT\|FLAG_PRESERVE\|FLAG_IGNORE\|EINJ_REG_MEMORY\|EINJ_REG_IO\|acpi_einj\|acpi_create_einj\|fw_cfg_acpi_tables\|preload_acpi_dsdt\|write_acpi_tables\|acpi_fill_madt\|acpi_fill_ivrs_ioapic\|acpi_create_ssdt_generator\|acpi_write_bert\|acpi_create_fadt\|acpi_fill_fadt\|arch_fill_fadt\|soc_fill_fadt\|mainboard_fill_fadt\|acpi_fill_gnvs\|acpi_fill_cnvs\|update_ssdt\|update_ssdtx\|acpi_fill_lpit\|acpi_checksum\|acpi_add_table\|acpi_create_madt_lapic\|acpi_create_madt_ioapic\|acpi_create_madt_irqoverride\|acpi_create_madt_lapic_nmi\|acpi_create_madt\|acpi_create_madt_lapics\|acpi_create_madt_lapic_nmis\|acpi_create_madt_lx2apic\|acpi_create_srat_lapic\|acpi_create_srat_mem\|acpi_create_srat_gia_pci\|acpi_create_mcfg_mmconfig\|acpi_create_srat_lapics\|acpi_create_srat\|acpi_create_slit\|acpi_create_hmat_mpda\|acpi_create_hmat\|acpi_create_vfct\|acpi_create_ipmi\|acpi_create_ivrs\|acpi_create_crat\|acpi_create_hpet\|acpi_write_hpet\|generate_cpu_entries\|acpi_create_mcfg\|acpi_create_facs\|acpi_create_dbg2\|acpi_write_dbg2_pci_uart\|acpi_create_dmar\|acpi_create_dmar_drhd\|acpi_create_dmar_rmrr\|acpi_create_dmar_atsr\|acpi_create_dmar_rhsa\|acpi_create_dmar_andd\|acpi_create_dmar_satc\|cpi_dmar_\|acpi_create_\|acpi_write_hest\|acpi_soc_get_bert_region\|acpi_resume\|mainboard_suspend_resume\|acpi_find_wakeup_vector\|ACPI_S\|acpi_sleep_from_pm1\|acpi_get_preferred_pm_profile\|acpi_get_sleep_type\|acpi_get_gpe\|permanent_smi_handler\|acpi_s3_resume_allowed\|acpi_is_wakeup_s3\|acpi_align_current\|get_acpi_table_revision' -- src/) |grep "<" Change-Id: Iaa85a16d83bafb00a6e77371dc36f574a88030f7 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60634 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
* superio/winbond/w83627hf/acpi: Replace LNot() with ASL 2.0 syntaxFelix Singer2022-01-011-2/+2
| | | | | | | | | | Replace `LNot (a)` with `!a`. Change-Id: I9f08cc180614e7d966256b2944745b0bc1d29865 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60596 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
* superio/winbond/w83627hf/acpi: Replace LOr() with ASL 2.0 syntaxFelix Singer2022-01-011-13/+13
| | | | | | | | | | Replace `LOr (a, b)` with `a || b`. Change-Id: I96cd391f1bdeea0c7e0c4a71c225a3e6925b4c6b Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60575 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
* superio/winbond/w83627hf/acpi: Replace LAnd() with ASL 2.0 syntaxFelix Singer2022-01-011-1/+1
| | | | | | | | | | Replace `LAnd (a, b)` with `a && b`. Change-Id: I66aedbab79d6b0d8e727d19b86458789a09889a8 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60573 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* superio/winbond/w83977tf/acpi: Replace Add(a,b,c) with ASL 2.0 syntaxFelix Singer2021-12-311-2/+2
| | | | | | | | | | Replace `Add (a, b, c)` with `c = a + b`. Change-Id: I8028497d89a504d9bb277de5c0247e324e4cd608 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60483 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
* superio/winbond/w83627hf/acpi: Replace Subtract(a,b,c) with ASL 2.0 syntaxFelix Singer2021-12-301-7/+7
| | | | | | | | | | Replace `Subtract (a, b, c)` with `c = a - b`. Change-Id: Idd97e662ec4be7092a655bc298dffb6d826bc497 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60476 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
* src/soc to src/superio: Fix spelling errorsMartin Roth2021-10-051-5/+5
| | | | | | | | | | | | These issues were found and fixed by codespell, a useful tool for finding spelling errors. Signed-off-by: Martin Roth <martin@coreboot.org> Change-Id: Ieafbc93e49fcef198ac6e31fc8a3b708c395e08e Reviewed-on: https://review.coreboot.org/c/coreboot/+/58082 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* src: Retype option API to use unsigned integersAngel Pons2021-05-063-3/+3
| | | | | | | | | | | | | The CMOS option system does not support negative integers. Thus, retype and rename the option API functions to reflect this. Change-Id: Id3480e5cfc0ec90674def7ef0919e0b7ac5b19b3 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52672 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Felix Singer <felixsinger@posteo.net>
* superio: Use get_int_option()Angel Pons2021-04-213-7/+4
| | | | | | | | Change-Id: Ia46b622c52f98d4cc5fb7d9b02e2aeb366ef3915 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47136 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
* src/superio: Fix typo in commentElyes HAOUAS2021-02-111-1/+1
| | | | | | | | | Change-Id: I2e5cac310af824eb9756b2aa9459239e0b5784da Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50428 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* superio: Add newline to log message about disabled mouse controllerPaul Menzel2020-10-171-1/+1
| | | | | | | | | | | | | | | A newline is missing at the end of the informational message. PNP: 002e.5 init nct5572d_init: Disable mouse controller.PNP: 002e.5 init finished in 0 msecs PNP: 002e.307 init Change-Id: Ic73ed97be0993637be1e97040784d5a8e70a22ae Fixes: 6ff1078990 ("superio: Log if mouse controller is disabled") Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45805 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* superio/winbond/*/acpi: Convert superio.asl to ASL 2.0 syntaxElyes HAOUAS2020-10-122-32/+32
| | | | | | | | Change-Id: I67e08a1099e41acb7031469069d9eddb274f7735 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45994 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* src: Remove redundant <device/pnp_def.h>Elyes HAOUAS2020-09-171-1/+0
| | | | | | | | | | | | | When <device/pnp.h> is needed, it is supposed to provide <device/pnp_def.h>. So remove redundant <device/pnp_def.h> includes. I'll remove also <device/pnp_type.h> in a separate patch. Change-Id: Ib9903ae456c32db4ba346020659c17c27a939e89 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45316 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Wim Vervoorn <wvervoorn@eltan.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
* src/superio: Use 'PNP_IDX_*' macros instead of magic numbersElyes HAOUAS2020-09-111-2/+3
| | | | | | | | Change-Id: I2f8d6d9e8b6e84bb6c2b4e73b0fbeca476130d05 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44833 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
* superio/winbond/wpcd376i: Resurrect the driverSamuel Holland2020-08-315-0/+93
| | | | | | | | | | | | | | | | This SuperIO chip is used on the Intel DQ45EK mainboard. Restore the driver that was deleted in commit d3a1a4171ee9 ("src/superio: Remove unused superio chips"). Changes from the previous version include: - Replacing the early serial implementation with Winbond common code, - Replacing the license boilerplate with SPDX headers, and - Removing unnecessary header file references. Change-Id: I0ff1a63c47d5dff2599c83a1cebe1ac5ff2136b1 Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44695 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* superio/*/Makefiles: Remove non-existing directory inclusionElyes HAOUAS2020-08-131-2/+0
| | | | | | | | Change-Id: I080f5b67c6e555fcc025ec11a1d15dddfe3a546d Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44317 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* superio/winbond/w83977tf: Add suspend related fieldsKeith Hui2020-06-161-1/+7
| | | | | | | | | | | | | Add two fields for the ACPI logical device to the ACPI code. They are used for taking asus/p3b-f board out of suspend by keyboard or mouse. Change-Id: Icaadfea6a4dce7a2d665e8d89a024359975f8b2c Signed-off-by: Keith Hui <buurin@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41096 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* superio/winbond/w83977tf: Scope UART configuration defines more locallyPatrick Georgi2020-05-201-0/+2
| | | | | | | | | | | By undefining the configuration after use we're sure that nobody else comes to depend on it without us noticing. Change-Id: I7c5cfd58be643d6431989fc69cf3b397920590b9 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41530 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* superio/winbond/w83977tf: Fix iasl warningKeith Hui2020-05-191-0/+2
| | | | | | | | | | | | | The common PnP serial port DSDT code is intentionally included twice for two serial ports with different LDNs. Undefine LDN and the PM register name before redefining for second serial port so iasl doesn't complain. Change-Id: I031905479c66698fb01da028e3f37d923396d2d9 Signed-off-by: Keith Hui <buurin@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41095 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* treewide: Remove "this file is part of" linesPatrick Georgi2020-05-1137-37/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Stefan thinks they don't add value. Command used: sed -i -e '/file is part of /d' $(git grep "file is part of " |egrep ":( */\*.*\*/\$|#|;#|-- | *\* )" | cut -d: -f1 |grep -v crossgcc |grep -v gcov | grep -v /elf.h |grep -v nvramtool) The exceptions are for: - crossgcc (patch file) - gcov (imported from gcc) - elf.h (imported from GNU's libc) - nvramtool (more complicated header) The removed lines are: - fmt.Fprintln(f, "/* This file is part of the coreboot project. */") -# This file is part of a set of unofficial pre-commit hooks available -/* This file is part of coreboot */ -# This file is part of msrtool. -/* This file is part of msrtool. */ - * This file is part of ncurses, designed to be appended after curses.h.in -/* This file is part of pgtblgen. */ - * This file is part of the coreboot project. - /* This file is part of the coreboot project. */ -# This file is part of the coreboot project. -# This file is part of the coreboot project. -## This file is part of the coreboot project. --- This file is part of the coreboot project. -/* This file is part of the coreboot project */ -/* This file is part of the coreboot project. */ -;## This file is part of the coreboot project. -# This file is part of the coreboot project. It originated in the - * This file is part of the coreinfo project. -## This file is part of the coreinfo project. - * This file is part of the depthcharge project. -/* This file is part of the depthcharge project. */ -/* This file is part of the ectool project. */ - * This file is part of the GNU C Library. - * This file is part of the libpayload project. -## This file is part of the libpayload project. -/* This file is part of the Linux kernel. */ -## This file is part of the superiotool project. -/* This file is part of the superiotool project */ -/* This file is part of uio_usbdebug */ Change-Id: I82d872b3b337388c93d5f5bf704e9ee9e53ab3a9 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41194 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* superio/winbond/w83977tf: Only list IR logical device if neededKeith Hui2020-05-112-0/+8
| | | | | | | | | | | | | | | | | Really old versions of W83977TF Super I/O had an IR logical device, but is no longer the case. It does not exist in the newer W83977EF version, installed in some Asus P2B family boards, and served by this same code. Add a config option on the off chance we may see board with it (as if we would) and don't include this device unless it is set. Saves us from the need to declare a not-present device off and/or extraneous PNP device errors about a not-present device. Change-Id: I761ebc41f1735a03e768339a68ca139167edc095 Signed-off-by: Keith Hui <buurin@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41004 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* acpi: Move ACPI table support out of arch/x86 (3/5)Furquan Shaikh2020-05-021-1/+1
| | | | | | | | | | | | | | | | | | | | | This change moves all ACPI table support in coreboot currently living under arch/x86 into common code to make it architecture independent. ACPI table generation is not really tied to any architecture and hence it makes sense to move this to its own directory. In order to make it easier to review, this change is being split into multiple CLs. This is change 3/5 which basically is generated by running the following command: $ git grep -iIl "arch/acpi" | xargs sed -i 's/arch\/acpi/acpi\/acpi/g' BUG=b:155428745 Change-Id: I16b1c45d954d6440fb9db1d3710063a47b582eae Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40938 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
* superio/winbond: Improve code formattingElyes HAOUAS2020-03-315-116/+116
| | | | | | | | | Change-Id: Ia63e21b957d89690f36929f9ffbe8a7bf8f0e84c Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39932 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* superio/winbond/{w83627hf,w83977tf}: Use macroElyes HAOUAS2020-03-312-136/+138
| | | | | | | | Change-Id: I3ac8dd2ba089970a18b460769dfc3fabf9395709 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39907 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* superio: Replace D1/D2 power states with D3Nico Huber2020-03-293-22/+22
| | | | | | | | | | | | | | | | | | | Spec says if any object to control the power state exists, at least D0 and D3 must be supported. And it seems Windows complains about the missing D3 support: https://ticket.coreboot.org/issues/257 Windows reported `*** STOP: 0x000000A5` with the first parameter `0x000000000000000D` (refers to a missing ACPI object) and the third parameter `0x000000003353505F` which is the name of the object in ASCII, little-endian (`_PS3`). Change-Id: Ifa28a7c56575848e76e4a1c542866413b4c44d50 Signed-off-by: Nico Huber <nico.h@gmx.de> Closes: https://ticket.coreboot.org/issues/257 Reviewed-on: https://review.coreboot.org/c/coreboot/+/39746 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* winbond/w83667hg-a: Disable mouse controller also during resumePaul Menzel2020-03-101-1/+1
| | | | | | | | | | | There is no reason to not disable the controller during resume. That way, no ASL is needed. Change-Id: I282a03647ee0958abb118fafe306abe5782db71c Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/22286 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
* src/superio: replace license boilerplate with SPDXFelix Held2020-01-3037-586/+74
| | | | | | | | | | | | The authors from the header of the files are added in a previous commit. Change-Id: Iafeaafb9689c65bd2f5de3960097ec0d4c1009e7 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38544 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* drivers/pc80/rtc: Separate {get|set}_option() prototypesKyösti Mälkki2020-01-093-3/+3
| | | | | | | | | | | | Long-term plan is to support loading runtime configuration from SPI flash as an alternative, so move these prototypes outside pc80/. Change-Id: Iad7b03dc985550da903d56b3deb5bd736013f8f1 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38192 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* superio/*: Don't use conf_mode directlyPatrick Rudolph2019-12-131-6/+6
| | | | | | | | | | | | Use the functions defined in device/pnp.h instead of using the conf_mode directly. This will make future refactoring easier. Change-Id: Ibb94d86b3ee861f44cded469ff58b545dd7311fd Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37638 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
* superio/*/*/acpi: Improve the readability of the IndexFieldElyes HAOUAS2019-11-052-4/+4
| | | | | | | | Change-Id: I64fdcbcbbd54334c1c551bc1346c6000ea82c97d Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36598 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
* superio: Use 'include <stdlib.h>' when appropriateElyes HAOUAS2019-10-206-6/+5
| | | | | | | | Change-Id: I55e7b680e128f29a9fd549edfb676e6571330677 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32830 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
* src/superio: Remove unused superio chipsMartin Roth2019-10-1311-404/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These SIOs are not being used or tested by abuild, so remove them from the tree. The only 3 currently unused SIOs that don't get removed here have board ports in review. src/superio/fintek/f71805f src/superio/fintek/f71872 src/superio/intel/i8900 src/superio/ite/it8671f src/superio/ite/it8716f src/superio/nsc/pc87309 src/superio/nsc/pc87360 src/superio/nsc/pc87366 src/superio/nsc/pc97317 src/superio/smsc/dme1737 src/superio/smsc/lpc47b272 src/superio/smsc/lpc47b397 src/superio/smsc/sch4037 src/superio/smsc/sio1036 src/superio/via/vt1211 src/superio/winbond/w83697hf src/superio/winbond/wpcd376i Signed-off-by: Martin Roth <martin@coreboot.org> Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I61d486d2c1e2b85eb292eaa78316c36e1735ebf4 Reviewed-on: https://review.coreboot.org/c/coreboot/+/35428 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* superio/winbond/w83627*: use hwm5_conf.h for HWM setupFelix Held2019-10-082-8/+8
| | | | | | | | Change-Id: Id78042606f02e02035dc917d162d0c98c9de38a4 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35862 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
* src: Use 'include <string.h>' when appropriateElyes HAOUAS2019-03-206-6/+0
| | | | | | | | | | | | | Drop 'include <string.h>' when it is not used and add it when it is missing. Also extra lines removed, or added just before local includes. Change-Id: Iccac4dbaa2dd4144fc347af36ecfc9747da3de20 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31966 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
* device/pnp: Add header files for PNP opsKyösti Mälkki2019-03-047-5/+7
| | | | | | | | Change-Id: Ifda495420cfb121ad32920bb9f1cbdeef41f6d3a Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/31698 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* arch/io.h: Drop unnecessary includeKyösti Mälkki2019-03-048-8/+0
| | | | | | | | Change-Id: I91158452680586ac676ea11c8589062880a31f91 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/31692 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* src: Remove unused include device/pnp_def.hElyes HAOUAS2019-02-071-1/+0
| | | | | | | | | | Change-Id: Ibb7ce42588510dc5ffb04c950c4c8c64e9a2fa37 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/31238 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
* superio/winbond/w83627ehg: Correct CR 0x2a commentElyes HAOUAS2019-02-041-1/+1
| | | | | | | | | | Register 0x2a [Bit 1] is a PIN89, PIN90 function select for i2c Change-Id: I9231a68ec7e9a3130a6b6975544bf89ab09cb3e6 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/31185 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
* Kconfig: Unify power-after-failure optionsNico Huber2019-01-062-11/+10
| | | | | | | | | | | | | | | | | | | | | | | | The newest and most useful incarnation was hiding in soc/intel/common/. We move it into the Mainboard menu and extend it with various flags to be selected to control the default and which options are visible. Also add a new `int` config MAINBOARD_POWER_FAILURE_STATE that moves the boolean to int conversion into Kconfig: 0 - S5 1 - S0 2 - previous state This patch focuses on the Kconfig code. The C code could be unified as well, e.g. starting with a common enum and safe wrapper around the get_option() call. TEST=Did what-jenkins-does with and without this commit and compared binaries. Nothing changed for the default configurations. Change-Id: I61259f864c8a8cfc7099cc2699059f972fa056c0 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/29680 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
* superio/*: Link early initialization into bootblockArthur Heymans2019-01-0614-14/+17
| | | | | | | | | | | | | | This allows to set up the SuperIO in the C_ENVIRONMENT_BOOTBLOCK bootblocks. It is likely unnecessary to do this in verstage. This also renames COMMON_ROMSTAGE to COMMON_PRE_RAM. Change-Id: I3d999611baa1e79c79fe6b1f01822ebaa5f85daf Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/30672 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
* {drivers,superio}: Remove unneeded include <pc80/mc146818rtc.h>Elyes HAOUAS2018-12-181-1/+0
| | | | | | | | Change-Id: Ia42c1f8559667e7711fac919df8bfbee8455e3cc Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/30198 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
* src: Add required space after "switch"Elyes HAOUAS2018-11-197-8/+8
| | | | | | | | Change-Id: I85cf93e30606bc7838852bd300a369e79370629a Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/29623 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
* src: Remove unneeded include <console/console.h>Elyes HAOUAS2018-11-163-3/+0
| | | | | | | | Change-Id: I40f8b4c7cbc55e16929b1f40d18bb5a9c19845da Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/29289 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
* src: Remove unneeded include <pc80/keyboard.h>Elyes HAOUAS2018-11-161-1/+0
| | | | | | | | Change-Id: I0dcdfb1fa782c7936a19de11adcf17387f49d9db Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/29309 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
* superio/winbond/w83627hf: Remove unused valueElyes HAOUAS2018-08-131-1/+1
| | | | | | | | Change-Id: I90d1997254f6766f4c61ff55449109adbdd783e3 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/28058 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
* superio: fix and extend pnp_info of wpcd376iStefan Tauner2018-08-092-25/+36
| | | | | | | | | | | | The implementation of wpcd376i in coreboot is based on the superiotool output which apparently was incorrect. This patch refines the implementation to match the datasheet. Change-Id: I0108e912dc4f603276074f0999c6d3146c3b13f9 Signed-off-by: Stefan Tauner <stefan.tauner@gmx.at> Reviewed-on: https://review.coreboot.org/27857 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-11 08:21:58 +0000