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* src/vendorcode/amd/fsp/picasso: Add HDMI 2.0 Disable setting section of FspmU...Patrick Huang2021-04-261-1/+3
* vc/amd/fsp/cezanne:Add s0i_enable upd controlJason Glenesk2021-04-261-1/+2
* vc/amd/fsp/cezanne: update SMU setting section of FspmUpd.hFelix Held2021-04-201-15/+15
* vc/amd/fsp/cezanne/FspmUpd: use arrays for DXIO/DDI descriptorsFelix Held2021-04-071-19/+5
* vc/amd/fsp/cezanne: update UPD headersMatt Papageorge2021-04-072-99/+108
* vc/amd/fsp/cezanne: add platform_descriptors.hFelix Held2021-04-071-0/+218
* vc/amd/fsp/picasso/platform_descriptors: fix typos in enum element namesFelix Held2021-04-051-2/+2
* soc/amd: GOP: add UPD for VBIOS bufferNikolai Vyssotski2021-03-122-3/+5
* vc/amd/fsp/picasso: fix DDI enum name prefixFelix Held2021-03-041-3/+3
* vc/amd/fsp/picasso: increase FSPS UPD block size from 0x152 to 0x202Nikolai Vyssotski2021-03-031-2/+2
* src: use ARRAY_SIZE where possiblePatrick Georgi2021-02-1549-181/+188
* vc/amd/fsp/cezanne: add FspGuids.hFelix Held2021-02-091-0/+16
* soc/amd/picasso: add UPD for RV2 USB3 phy setting adjustChris Wang2021-02-051-1/+12
* drivers/intel/fsp2_0: Fix running on x86_64Patrick Rudolph2021-02-042-4/+17
* vendorcode/amd/fsp/cezanne: add UPD structs from FSP buildFelix Held2021-02-042-2/+99
* soc/amd/picasso: clean up and re-sort UPD tableChris Wang2021-02-031-20/+16
* soc/amd/picasso: Add UPDs for support eDP power sequence adjustChris Wang2021-01-251-10/+19
* soc,vendorcode/amd/cezanne: add basic FSP integrationFelix Held2021-01-244-0/+122
* sb/amd/pi/hudson: Enable use of common GPIO APIKyösti Mälkki2020-12-281-1/+1
* soc/amd/picasso: Add UPDs for support eDP phy tunning adjustChris Wang2020-12-211-1/+11
* amd_blobs: Always set default pathsNico Huber2020-12-051-5/+5
* src: Remove redundant use of ACPI offset(0)Elyes HAOUAS2020-12-032-4/+0
* vc/amd/agesa/f.../Proc/Mem/Tech/DDR3: Support a custom memory profileMike Banon2020-12-0210-3/+337
* vc/amd/agesa/f.../Proc/Mem/Tech/DDR3: Support XMP memory profilesMike Banon2020-12-025-24/+227
* cpu/amd/pi: Remove unused cpu code 00660F01Martin Roth2020-11-222-13/+2
* vc/amd/pi/00670F00: Add raw AGESA binary only to COREBOOT CBFSFurquan Shaikh2020-11-221-0/+1
* soc/amd/picasso: Update coreboot UPD variable names to include unitsZheng Bao2020-11-061-21/+21
* vc/amd/fsp: Update bl_errorcodes_public.hMartin Roth2020-10-302-6/+50
* vc/amd/fsp/picasso: Remove typedefs in bl_syscall_public.hJason Glenesk2020-10-231-54/+43
* vendorcode/amd: Fix typo in *is defined* in commentsPaul Menzel2020-10-178-62/+62
* vc/amd/Kconfig: Add missing dot in AMD domain www.amd.comPaul Menzel2020-10-171-1/+1
* vc/amd/fsp: Update the svc call header for the Mod Exp SVCMartin Roth2020-10-071-0/+21
* vc/amd/fsp/picasso: Add bit definitions for PSP info in transfer blockMartin Roth2020-10-011-0/+5
* vc/amd/fsp/picasso: Update to UPD 1.0.1.3Raul E Rangel2020-09-251-5/+9
* vc/amd/fsp/picasso: Fix FSP-S UPD header file formattingFelix Held2020-09-111-3/+3
* vc/amd/fsp/picasso: Sync FSP-S UPD header fileMarshall Dawson2020-09-101-1/+5
* {include,mb,soc,sb,vendorcode}: Make hexadecimal notation consistentSubrata Banik2020-09-0130-820/+820
* vc/amd/fsp/picasso: Add FSP-M UPD enable_sata to 0xC7 to match FSPNikolai Vyssotski2020-08-281-1/+1
* vc/amd/agesa/f15tn: add DDR1866_FREQUENCY to DdrMaxRateTab tableMike Banon2020-08-261-0/+1
* nb/amd/agesa: define DDR3_SPD_SIZE as a common valueMike Banon2020-08-243-3/+6
* vc/amd/fsp/picasso: add FSP-M UPD to disable the HD Audio controllerFelix Held2020-08-231-1/+1
* Revert "vc/amd/fsp/picasso: add FSP-M UPD to disable the SATA controller"Felix Held2020-08-231-1/+1
* vc/amd/agesa/f16kb: raise the UDIMM Freq limit 1333MT/s values to 1600MT/sMike Banon2020-08-201-6/+6
* vc/amd/fsp/picasso: update pci descriptor commentsMatt Papageorge2020-08-191-18/+26
* vc/amd/agesa/f15tn: add 933 MHz to GfxMemClockFrequencyDefinitionTableMike Banon2020-08-171-1/+1
* vc/amd/fsp/picasso: add FSP-M UPD to disable the SATA controllerFelix Held2020-08-171-1/+1
* vc/amd/picasso/bl_uapp: Update header fileMarshall Dawson2020-08-131-1/+24
* vendorcode/amd/fsp/picasso Fix type 17 smbios misalignmentJason Glenesk2020-08-051-3/+1
* vc/amd/fsp/picasso: document requirements for DXIO PCIe port assignmentsFelix Held2020-08-021-1/+10
* vc/amd/fsp/picasso: document DXIO lane number mappingFelix Held2020-07-311-0/+26
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