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* arm64: Correct shareability option for normal memoryFurquan Shaikh2015-04-222-0/+7
* google/urara: retrieve network device information from VPDVadim Bendebury2015-04-221-0/+16
* vpd: process WiFi MACs along with ethernet MACsVadim Bendebury2015-04-221-49/+69
* vpd: decode calibration data into binaryVadim Bendebury2015-04-221-3/+25
* imgtec/pistachio: increase RAM CBFS cache sizeVadim Bendebury2015-04-221-2/+2
* chromeec: Access ID + flags through ACPI I/O portsShawn Nematbakhsh2015-04-221-22/+61
* lib: add base64 decoderVadim Bendebury2015-04-223-0/+182
* google/veyron_*: Increase SPI flash frequency to 24.75MHzJulius Werner2015-04-227-7/+7
* google/urara: use board ID information to set up hardwareIonela Voinescu2015-04-225-39/+80
* rockchip/rk3288: Fix SPI clock divisor calculationJulius Werner2015-04-228-17/+13
* chromeec: Support accessing memmap data over port 62/66Shawn Nematbakhsh2015-04-223-41/+79
* chromeec: Update ec_commands.h from EC repositoryShawn Nematbakhsh2015-04-221-168/+524
* arch/arm64: allow floating-point registers accessYen Lin2015-04-222-0/+41
* google/rush_ryu: add serialno from vpdStephen Barber2015-04-221-0/+8
* vpd: populate coreboot table with serialnoStephen Barber2015-04-223-1/+54
* vboot2: provide config option to clear dev mode state on recoveryVadim Bendebury2015-04-222-0/+11
* vboot2: ignore physical dev switch in case virtual mode is configuredVadim Bendebury2015-04-221-4/+5
* google/veyron_*: add ELPIDA F8132A3MA and FA232A2MA sdramjinkun.hong2015-04-2218-12/+948
* arm64: provide icache_invalidate_all()Aaron Durbin2015-04-223-3/+15
* elog: Eliminate CONFIG_ELOG_FULL_THRESHOLD and CONFIG_ELOG_SHRINK_SIZESol Boucher2015-04-223-43/+22
* google/veyron_*: update sdram-ddr3-samsung-4GB.incjinkun.hong2015-04-226-42/+42
* rockchip/rk3288: use bl_en instead lcd_bl to fill_lb_gpiohuang lin2015-04-229-21/+21
* vboot: when configured, pass the wipeout request to vbootVadim Bendebury2015-04-223-0/+13
* qualcomm/ipq806x: report versions of RPM and DDR init componentsVadim Bendebury2015-04-221-1/+20
* qualcomm/ipq806x: add board id value for SP5Vadim Bendebury2015-04-221-0/+1
* google/urara: retrieve board ID from a CBFS fileVadim Bendebury2015-04-222-4/+101
* broadcom/cygnus: add timestamps in pre-ram stagesDaisuke Nojiri2015-04-222-25/+6
* google/purin: add DMA coherent regionDaisuke Nojiri2015-04-228-8/+76
* broadcom/cygnus: Initialize dram in romstage.Icarus Chau2015-04-2219-11/+22763
* broadcom/cygnus: Fix missing writel->write32 transformationPatrick Georgi2015-04-211-17/+17
* cygnus: add QSPI driverCorneliu Doban2015-04-213-8/+292
* veyron: add new SDRAM configuration with ram-code 1101bZhengShunQian2015-04-2112-12/+12
* pistachio: Remove 50% DDR bandwidth restrictionIonela Voinescu2015-04-211-1/+1
* pistachio: Decrease DDR ODT from 75R to 50RIonela Voinescu2015-04-211-1/+1
* pistachio: clean DDR2 initialization codeIonela Voinescu2015-04-211-155/+15
* storm: print uber-sbl informationVadim Bendebury2015-04-211-0/+42
* armv7: preserve bootblock invocation parameterVadim Bendebury2015-04-213-2/+27
* ipq808x: add uber sbl parameter definitionsVadim Bendebury2015-04-211-0/+65
* urara: I2C clock and MFIO setup function for all interfacesIonela Voinescu2015-04-211-19/+25
* pistachio: add clock setup for all I2C interfacesIonela Voinescu2015-04-213-20/+20
* Unify byte order macros and clrsetbitsJulius Werner2015-04-2132-378/+92
* arm(64): Manually clean up the mess left by write32() transitionJulius Werner2015-04-2126-160/+402
* arm(64): Globally replace writel(v, a) with write32(a, v)Julius Werner2015-04-21131-2670/+2536
* arm(64): Change write32() argument order to match x86Julius Werner2015-04-216-16/+16
* arm(64): Replace write32() and friends with writel()Julius Werner2015-04-2143-507/+375
* romstage_handoff: Fix for changing CBMEM structureDuncan Laurie2015-04-211-1/+3
* veyron_{brain,danger}: Specify vboot romstage and ramstage indicesDavid Hendricks2015-04-212-2/+16
* rk3288: disable rk808 DCDC_UV_ACT_REG restart converter functionhuang lin2015-04-211-0/+5
* veyron: The ODT function is disabled for LPDDR3jinkun.hong2015-04-2110-10/+10
* veyron: Sync up SDRAM configurationsJulius Werner2015-04-2138-112/+2367
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