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* southbridge/via: Update license headersMartin Roth2016-04-131-0/+13
* southbridge/ti: Update license headersMartin Roth2016-04-131-0/+13
* southbridge/ricoh: Update license headersMartin Roth2016-04-131-0/+13
* southbridge/nvidia: Update license headersMartin Roth2016-04-133-1/+41
* src/soc/marvell: Update license headersMartin Roth2016-04-131-0/+13
* src/device: Update license headersMartin Roth2016-04-133-10/+36
* mainboard/google: Update license headersMartin Roth2016-04-1328-5/+361
* mainboard/intel: Update license headersMartin Roth2016-04-1311-2/+84
* device/pci_rom: Always use pci_romPatrick Rudolph2016-04-131-2/+1
* soc/intel/apollolake: Add tsc_freq.c to all the stagesAndrey Petrov2016-04-131-0/+2
* soc/intel/apollolake: Enable TPM in bootblock stageBora Guvendik2016-04-132-0/+31
* soc/intel/apollolake: Update platform-specific FSP headersAndrey Petrov2016-04-133-283/+1113
* soc/intel/apollolake: Reserve IMRs (Isolated Memory Regions)Andrey Petrov2016-04-132-1/+53
* soc/intel/apollolake: logically group PMC BAR programmingAaron Durbin2016-04-131-11/+4
* src/soc/intel/common: Fix CID 1295499, remove dead codeLee Leahy2016-04-131-19/+20
* sb/amd/sp5100: Apply Sx State Settings per RPR v3.02Timothy Pearson2016-04-111-27/+37
* sb/amd/sp5100: Enable CPU reset timing option per RPR v3.02Timothy Pearson2016-04-111-0/+5
* sb/amd/sp5100: Disable ASF legacy sensor support per RPR v3.02Timothy Pearson2016-04-112-1/+9
* soc/intel/apollolake: Fill _PRT entry in DSDTZhao, Lijian2016-04-112-0/+111
* soc/intel/apollolake: Add lpss dsdt entryZhao, Lijian2016-04-112-0/+125
* soc/apollolake/acpi: Fill ACPI HPET tableZhao, Lijian2016-04-113-0/+12
* soc/apollolake: Add lpc device driverLance Zhao2016-04-112-0/+49
* soc/apollolake/acpi: Fill in ACPI MADT tableLance Zhao2016-04-111-4/+27
* and/nb/mct_ddr3: Pack all structures passed to ramstage and set alignmentTimothy Pearson2016-04-112-9/+9
* soc/intel/apollolake: Enabling using of MRC data when availableAndrey Petrov2016-04-111-3/+28
* soc/intel/apollolake: Enable CACHE_MRC_SETTINGSHannah Williams2016-04-112-2/+7
* cpu/x86/tsc: Compile TSC timer for postcar as wellAndrey Petrov2016-04-111-0/+1
* nb/amd/amdfam10: Write MCT variables to flash after PCI configurationTimothy Pearson2016-04-112-12/+7
* soc/apollolake/acpi: Fill ACPI MCFG tableLance Zhao2016-04-111-0/+4
* soc/intel/apollolake: Implement SPI controller driverAlexandru Gagniuc2016-04-115-0/+439
* cpu/x86/tsc: remove conditional compilationAaron Durbin2016-04-111-8/+8
* cpu/x86/tsc: compile same code for all stagesAaron Durbin2016-04-112-22/+8
* cpu/x86/tsc: prepare for CAR_GLOBAL in delay_tsc.cAaron Durbin2016-04-111-10/+19
* src/cpu/x86: remove TSC_CALIBRATE_WITH_IOAaron Durbin2016-04-112-64/+0
* beaglebone: Add code to set the value of the LEDsGabe Black2016-04-103-0/+74
* am335x: Add some code for manipulating GPIOsGabe Black2016-04-103-0/+160
* am335x: Add data structures for the clock module registersGabe Black2016-04-101-0/+234
* nb/intel/sandybridge/raminit: always use mrccachePatrick Rudolph2016-04-101-25/+77
* ec/lenovo/h8: do not reset volume on s3 wakeupChristopher Spinrath2016-04-101-1/+2
* mb/samsung/lumpy/romstage: read SPD data of removable DIMMPatrick Rudolph2016-04-101-1/+6
* Change la to li (load immediate)Ronald G. Minnich2016-04-081-2/+2
* superio/winbond/w83667hg-a: Set SPI device mask correctlyTimothy Pearson2016-04-082-3/+4
* soc/intel/apollolake: Override default to_flash_offset implementationAlexandru Gagniuc2016-04-081-0/+8
* soc/intel/common/nvm: Allow overriding to_flash_offset() functionAlexandru Gagniuc2016-04-082-5/+20
* Revert "nb/amd/mct_ddr3: Enable DIMM parity when RDIMMs installed"Timothy Pearson2016-04-081-1/+3
* nb/amd/mct_ddr3: Reenable sync flood after ECC initTimothy Pearson2016-04-082-8/+9
* mb/asus/kgpe-d16|kcma-d8: Enable early MCE reportingTimothy Pearson2016-04-082-0/+12
* nb/amd/mct_ddr3: Add MCE reporting logicTimothy Pearson2016-04-083-1/+25
* nb/amd/amdfam10: Only flag machine check exception if valid bit is setTimothy Pearson2016-04-081-1/+1
* sb/amd/sb700: Add sb7xx_51xx_decode_last_reset()Timothy Pearson2016-04-082-1/+13