| Commit message (Expand) | Author | Age | Files | Lines |
* | soc/amd/common/fsp/pci: Add helper methods for PCI IRQ table | Raul E Rangel | 2021-05-09 | 3 | -0/+51 |
* | soc/amd/picasso/pci_gpp: Switch to using acpigen_write_pci_GNB_PRT | Raul E Rangel | 2021-05-09 | 1 | -63/+1 |
* | soc/amd/common/block/pci: Implement acpigen_write_pci_{GNB,FCH}_PRT | Raul E Rangel | 2021-05-09 | 3 | -2/+217 |
* | soc/amd/{picasso,common/blocks/pci}: Move populate_pirq_data | Raul E Rangel | 2021-05-09 | 3 | -30/+35 |
* | soc/amd/picasso: Migrate to struct pci_routing_info | Raul E Rangel | 2021-05-09 | 1 | -46/+21 |
* | soc/amd/common/block/pci: Introduce struct pci_routing_info | Raul E Rangel | 2021-05-09 | 3 | -0/+85 |
* | soc/amd/cezanne/acpi/soc: call WAL1 for AC/DC state ALIB call | Felix Held | 2021-05-08 | 1 | -0/+4 |
* | soc/amd/picasso/acpi/cpu: move WAL1 method that calls ALIB to common | Felix Held | 2021-05-08 | 3 | -29/+31 |
* | soc/amd/picasso,common: move ALIB DPTC parameter struct to common code | Felix Held | 2021-05-08 | 2 | -6/+6 |
* | soc/amd/picasso,common: move ALIB DPTC IDs to common code | Felix Held | 2021-05-08 | 2 | -27/+32 |
* | soc/amd/picasso/root_complex: move DPTC_TOTAL_UPDATE_PARAMS out of enum | Felix Held | 2021-05-08 | 1 | -1/+2 |
* | soc/amd: factor out ACPI ALIB function numbers to common code | Felix Held | 2021-05-08 | 4 | -4/+17 |
* | mb/google/volteer: adjust the size for RO/RW mcache | Zhuohao Lee | 2021-05-08 | 1 | -0/+8 |
* | trogdor: Add backlight support for sn65dsi86bridge for Homestar | Vinod Polimera | 2021-05-08 | 4 | -0/+31 |
* | drivers/sn65dsi86: Switch EDID reading to use "indirect mode" | Julius Werner | 2021-05-08 | 1 | -71/+139 |
* | soc/amd/common/acpi/pci_int.asl: Allow IRQ sharing | Raul E Rangel | 2021-05-07 | 1 | -3/+3 |
* | skylake mainboards: Use enum values for SaGv | Angel Pons | 2021-05-07 | 11 | -11/+11 |
* | skylake DT/HALO mainboards: Drop `SaGv` setting | Angel Pons | 2021-05-07 | 3 | -4/+0 |
* | aopen/dxplplusu: Fix IOAPIC in ASL | Kyösti Mälkki | 2021-05-07 | 1 | -1/+1 |
* | nb/intel/e7505: Fix for RESOURCE_ALLOCATOR_V4 | Kyösti Mälkki | 2021-05-07 | 1 | -2/+2 |
* | soc/amd/common: Add Kconfig/Makefile support for common/fsp/* | Raul E Rangel | 2021-05-07 | 2 | -0/+9 |
* | mb/google/volteer: Create volet variant | Sheng-Liang Pan | 2021-05-07 | 8 | -0/+52 |
* | mb/pcengines/apu1: Disable memory bank interleaving | Michał Żygowski | 2021-05-07 | 1 | -0/+2 |
* | mb/pcengines/apu2/OemCustomize.c: make AGESA AmdInitPost happy | Michał Żygowski | 2021-05-07 | 1 | -0/+16 |
* | soc/mediatek/mt8195: Turn off L2C SRAM and reconfigure as L2 cache | Yidi Lin | 2021-05-07 | 3 | -0/+34 |
* | mb/google/cherry: configure GPIOs | Yu-Ping Wu | 2021-05-07 | 3 | -1/+43 |
* | mb/intel/adlrvp: Program CPU PCIE RP GPIOs in early GPIO | Maulik V Vaghela | 2021-05-07 | 1 | -0/+88 |
* | mb/google/volteer/var/elemi: Add spd for K4AAG165WB-BCWE | Wisley Chen | 2021-05-07 | 3 | -1/+3 |
* | sb/intel/common/pmclib: Use pmbase functions | Arthur Heymans | 2021-05-07 | 1 | -17/+11 |
* | sb/intel/common: Fix platform_is_resuming() | Arthur Heymans | 2021-05-07 | 1 | -1/+5 |
* | sb/intel/common: Implement acpi_is_wakeup_s3() | Arthur Heymans | 2021-05-07 | 1 | -0/+5 |
* | soc/intel/{adl,tgl,jsl}: Enable power button smi after BS_CHIPS_EXIT | Kane Chen | 2021-05-07 | 6 | -6/+38 |
* | soc/intel/{adl,tgl,jsl}: Add smihandler_soc_disable_busmaster | Kane Chen | 2021-05-07 | 3 | -0/+24 |
* | mb/google/mancomb: Update AMDFW config file | Martin Roth | 2021-05-07 | 2 | -0/+44 |
* | mb/google/mancomb: Implement tis_plat_irq_status | Martin Roth | 2021-05-06 | 2 | -0/+13 |
* | mb/google/mancomb: Update Kconfig with needed options | Martin Roth | 2021-05-06 | 1 | -0/+4 |
* | mb/google/mancomb: Fix EC SCI configuration | Martin Roth | 2021-05-06 | 1 | -3/+3 |
* | mb/google/mancomb: Switch eSPI ALERT# to in-band | Raul E Rangel | 2021-05-06 | 1 | -1/+1 |
* | mb/google/guybrush: Switch eSPI ALERT# to in-band | Raul E Rangel | 2021-05-06 | 1 | -1/+1 |
* | soc/amd/common/espi,mb/: Allow configuring open drain ALERT# | Raul E Rangel | 2021-05-06 | 10 | -14/+39 |
* | soc/amd/common/espi: Don't set alert pin in espi_set_initial_config | Raul E Rangel | 2021-05-06 | 1 | -3/+0 |
* | soc/amd/common/espi: Print set eSPI peripheral config | Raul E Rangel | 2021-05-06 | 1 | -0/+2 |
* | soc/amd/{common/picasso}: Move pci_int.asl | Raul E Rangel | 2021-05-06 | 2 | -1/+1 |
* | soc/amd/{picasso/common}: Move populate_pirq_data prototype to common | Raul E Rangel | 2021-05-06 | 4 | -10/+3 |
* | vc/amd/fsp/cezanne: Add AMD_FSP_PCIE_DEVFUNC_REMAP_HOB_GUID | Raul E Rangel | 2021-05-06 | 1 | -0/+4 |
* | emulation/qemu-x86: Select BOOT_DEVICE_NOT_SPI_FLASH | Arthur Heymans | 2021-05-06 | 2 | -0/+2 |
* | drivers/pc80/rtc/option.c: Constrain API to integer values | Angel Pons | 2021-05-06 | 2 | -15/+15 |
* | src: Retype option API to use unsigned integers | Angel Pons | 2021-05-06 | 58 | -113/+113 |
* | include/console: Align ramstage Boot State Machine postcodes | Subrata Banik | 2021-05-06 | 1 | -8/+8 |
* | nb/amd/{agesa,pi}: Avoid overflows during DRAM calculation | Michał Żygowski | 2021-05-06 | 4 | -155/+142 |