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* amd/cezanne: verify transfer buffer in bootblockKangheui Won2021-05-101-0/+7
* psp_verstage: differentiate bios entryKangheui Won2021-05-104-1/+14
* psp_verstage: move platform-specific code to chipset.cKangheui Won2021-05-106-27/+37
* cezanne/psp_verstage: clean up duplicated targetKangheui Won2021-05-101-3/+0
* cezanne/psp_verstage: populate a/b firmwareKangheui Won2021-05-102-0/+63
* mb/google/guybrush: Enable GFX HDA deviceKarthikeyan Ramasubramanian2021-05-101-0/+1
* mb/google/guybrush: Enable PP5000_PENEric Peers2021-05-101-1/+1
* soc/mediatek/mt8195: Add RTC driverYuchen Huang2021-05-109-2/+263
* soc/mediatek/mt8195: Add clk_buf driverYuchen Huang2021-05-105-5/+9
* soc/mediatek/mt8195: Configure eMMC and SDCardWenbin Mei2021-05-103-0/+120
* soc/mediatek/mt8195: Add i2c driver supportkewei xu2021-05-103-0/+230
* soc/mediatek/mt8195: Add mt6360 driver for LDO accessAndrew SH Cheng2021-05-102-0/+357
* soc/amd/cezanne: Generate PCI GPP ACPI namesRaul E Rangel2021-05-091-31/+9
* soc/amd/cezanne: Enable GNB IO-APIC _PRTRaul E Rangel2021-05-091-2/+1
* soc/amd/cezanne: add GNB IOAPIC supportFelix Held2021-05-094-1/+29
* mb/google/guybrush: Populate PIC IRQ dataRaul E Rangel2021-05-091-8/+8
* soc/amd/cezanne: Generate PCI routing tableRaul E Rangel2021-05-092-2/+30
* soc/amd/cezanne: Populate PCI_INTR registersRaul E Rangel2021-05-092-0/+7
* soc/amd/common/fsp/pci: Add helper methods for PCI IRQ tableRaul E Rangel2021-05-093-0/+51
* soc/amd/picasso/pci_gpp: Switch to using acpigen_write_pci_GNB_PRTRaul E Rangel2021-05-091-63/+1
* soc/amd/common/block/pci: Implement acpigen_write_pci_{GNB,FCH}_PRTRaul E Rangel2021-05-093-2/+217
* soc/amd/{picasso,common/blocks/pci}: Move populate_pirq_dataRaul E Rangel2021-05-093-30/+35
* soc/amd/picasso: Migrate to struct pci_routing_infoRaul E Rangel2021-05-091-46/+21
* soc/amd/common/block/pci: Introduce struct pci_routing_infoRaul E Rangel2021-05-093-0/+85
* soc/amd/cezanne/acpi/soc: call WAL1 for AC/DC state ALIB callFelix Held2021-05-081-0/+4
* soc/amd/picasso/acpi/cpu: move WAL1 method that calls ALIB to commonFelix Held2021-05-083-29/+31
* soc/amd/picasso,common: move ALIB DPTC parameter struct to common codeFelix Held2021-05-082-6/+6
* soc/amd/picasso,common: move ALIB DPTC IDs to common codeFelix Held2021-05-082-27/+32
* soc/amd/picasso/root_complex: move DPTC_TOTAL_UPDATE_PARAMS out of enumFelix Held2021-05-081-1/+2
* soc/amd: factor out ACPI ALIB function numbers to common codeFelix Held2021-05-084-4/+17
* mb/google/volteer: adjust the size for RO/RW mcacheZhuohao Lee2021-05-081-0/+8
* trogdor: Add backlight support for sn65dsi86bridge for HomestarVinod Polimera2021-05-084-0/+31
* drivers/sn65dsi86: Switch EDID reading to use "indirect mode"Julius Werner2021-05-081-71/+139
* soc/amd/common/acpi/pci_int.asl: Allow IRQ sharingRaul E Rangel2021-05-071-3/+3
* skylake mainboards: Use enum values for SaGvAngel Pons2021-05-0711-11/+11
* skylake DT/HALO mainboards: Drop `SaGv` settingAngel Pons2021-05-073-4/+0
* aopen/dxplplusu: Fix IOAPIC in ASLKyösti Mälkki2021-05-071-1/+1
* nb/intel/e7505: Fix for RESOURCE_ALLOCATOR_V4Kyösti Mälkki2021-05-071-2/+2
* soc/amd/common: Add Kconfig/Makefile support for common/fsp/*Raul E Rangel2021-05-072-0/+9
* mb/google/volteer: Create volet variantSheng-Liang Pan2021-05-078-0/+52
* mb/pcengines/apu1: Disable memory bank interleavingMichał Żygowski2021-05-071-0/+2
* mb/pcengines/apu2/OemCustomize.c: make AGESA AmdInitPost happyMichał Żygowski2021-05-071-0/+16
* soc/mediatek/mt8195: Turn off L2C SRAM and reconfigure as L2 cacheYidi Lin2021-05-073-0/+34
* mb/google/cherry: configure GPIOsYu-Ping Wu2021-05-073-1/+43
* mb/intel/adlrvp: Program CPU PCIE RP GPIOs in early GPIOMaulik V Vaghela2021-05-071-0/+88
* mb/google/volteer/var/elemi: Add spd for K4AAG165WB-BCWEWisley Chen2021-05-073-1/+3
* sb/intel/common/pmclib: Use pmbase functionsArthur Heymans2021-05-071-17/+11
* sb/intel/common: Fix platform_is_resuming()Arthur Heymans2021-05-071-1/+5
* sb/intel/common: Implement acpi_is_wakeup_s3()Arthur Heymans2021-05-071-0/+5
* soc/intel/{adl,tgl,jsl}: Enable power button smi after BS_CHIPS_EXITKane Chen2021-05-076-6/+38
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