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* util: Update description filesMartin Roth2022-05-301-1/+1
| | | | | | | | | | | | | | | - Spelling fix - Add languages - Update formatting - Move notes that shouldn't be in the description file to a README Change-Id: I4af37327d5834f8546a3f967585658fb5686f17a Signed-off-by: Martin Roth <gaumless@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/64581 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Maxim Polyakov <max.senia.poliak@gmail.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
* Documentation: Move intelp2m from description.md to DocumentionMartin Roth2022-05-301-177/+2
| | | | | | | | | | | | | The description.md file for the intelp2m utility wasn't the description that was needed - just a subject, and what language it was written in. It was instead a set of more full documentation, so move it into the Documentation directory and create a new description file. Change-Id: Ia180ae41f91f8b8eb408351a9e44e899edc031d3 Signed-off-by: Martin Roth <gaumless@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/64578 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net>
* util/intelp2m: Add support for Alder Lake macro generationMichał Kopeć2022-05-251-0/+1
| | | | | | | | | | | | | | Add support for Alder Lake as a separate parsing profile, copying the existing 'Cannon' profile and adjusting for differences in reset mapping and GPIO macro generation. TEST=Generate GPIO macros for MSI PRO Z690-A Change-Id: I5871394bcb0636c2c803607ffb129441aa934417 Signed-off-by: Michał Kopeć <michal.kopec@3mdeb.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63403 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Maxim Polyakov <max.senia.poliak@gmail.com>
* util/intelp2m: Fix typosBenjamin Doron2020-10-261-3/+3
| | | | | | | | Change-Id: I7210fb44ed54d365181ca23c6b92d2269dc8a697 Signed-off-by: Benjamin Doron <benjamin.doron00@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45007 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* util/intelp2m: Update output information format in the commentsMaxim Polyakov2020-10-121-67/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the information format in the comments above the macros in the generated gpio.h file: PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_39, UP_20K, DEEP, NF1, TxLASTRxE, DISPUPD), /* LPSS_UART0_TXD */ -->(i) /* GPIO_39 - LPSS_UART0_TXD */ --> (ii) /* DW0: 0x44000400, DW1: 0x00003100 */ --> (ii) /* DW0 : PAD_TRIG(OFF) - IGNORED */ --> (iii) /* _PAD_CFG_STRUCT(GPIO_39, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF), PAD_PULL(UP_20K) | PAD_IOSTERM(DISPUPD)), */ --> (iiii) PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_39, UP_20K, DEEP, NF1, TxLASTRxE, DISPUPD), Also, in the case of field macros: /* GPIO_39 - LPSS_UART0_TXD */ --> (ii) /* DW0: 0x44000400, DW1: 0x00003100 */ --> (ii) /* DW0 : PAD_TRIG(OFF) - IGNORED */ --> (iii) /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_39, UP_20K, DEEP, NF1, TxLASTRxE, DISPUPD), */ --> (iiii) PAD_CFG_STRUCT(GPIO_39, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF), PAD_PULL(UP_20K) | PAD_IOSTERM(DISPUPD)), By default, if do not use the -i... option, then additional information in comments will not be generated. TEST: git clone https://github.com/maxpoliak/inteltool-examples.git test ./intelp2m -n -file test/inteltool-asrock-h110m-stx.log ./intelp2m -fld cb -file test/inteltool-asrock-h110m-stx.log ./intelp2m -fld fsp -file test/inteltool-asrock-h110m-stx.log ./intelp2m -fld raw -file test/inteltool-asrock-h110m-stx.log Before and after (now with -i key) the patch, gpio.h is no different. Change-Id: I760f4aadece786ea455fb7569f42e06fefce2b61 Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45168 Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* util/intelp2m: Add support for Cannonlake-LP SoCsMatt DeVillier2020-08-181-1/+2
| | | | | | | | | | | | | | | | Add support for Cannonlake-LP SoCs (Whiskeylake-U, Coffeelake-U, Cometlake-U) as a separate parsing profile, copying the existing 'Sunrise' profile and adjusting for differences in reset mapping and GPIO macro generation Test: convert inteltool GPIO log dump into coreboot macros for an out-of-tree CML-U board. Change-Id: I86296697ee892af7aa0818fb608b6d68fad2f307 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44457 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Maxim Polyakov <max.senia.poliak@gmail.com>
* util/intelp2m: Add Intel Pad to Macro utilityMaxim Polyakov2020-07-281-0/+201
This patch adds a new utility for converting a pad configuration from the inteltool dump to the PAD_CFG_*() macros [1] for coreboot and GPIO config data structures for FSP/sdk2-platforms/slimbootloader [2,3]. Mirror: https://github.com/maxpoliak/pch-pads-parser.git [1] src/soc/intel/common/block/include/intelblocks/gpio_defs.h [2] https://slimbootloader.github.io/tools/index.html#gpio-tool [3] 3rdparty/fsp/CometLakeFspBinPkg/CometLake1/Include/GpioSampleDef.h Change-Id: If3e3b523c4f63dc2f91e9ccd16934e3a1b6e21fa Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35643 Reviewed-by: Andrey Petrov <andrey.petrov@gmail.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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