summaryrefslogtreecommitdiffstats
path: root/util/msrtool
Commit message (Collapse)AuthorAgeFilesLines
* util/msrtool: Fix formatting issues reported by checkpatchPatrick Georgi2020-01-3010-1359/+1377
| | | | | | | | | Change-Id: I487a9e6a6416bbe874ddadeaf464f54c02cacb0a Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38635 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* util/msrtool: Fix typosPatrick Georgi2020-01-303-8/+8
| | | | | | | | | | | | | | The Intel docs also call it "Scalable Bus Speed", so the typo is on us. Found by: util/lint/checkpatch.pl --types TYPO_SPELLING --fix-inplace --strict --terse -f util/msrtool/*.c Change-Id: I84bdba687060e695d29420b9dd8eeb5f4ec44610 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38634 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* util/msrtool: Fix typosElyes HAOUAS2018-08-283-22/+22
| | | | | | | | | Change-Id: I36ed2c33f9bed3e640871283c2cb163d6800d1d5 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/28289 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
* util: Add description.md to each utilTom Hiller2018-07-261-0/+1
| | | | | | | | | | | | Descriptions are taken from the files themselves or READMEs. Description followed by a space with the language in marked up as code. Change-Id: I5f91e85d1034736289aedf27de00df00db3ff19c Signed-off-by: Tom Hiller <thrilleratplay@gmail.com> Reviewed-on: https://review.coreboot.org/27563 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
* util/msrtool: Add Pentium D supportElyes HAOUAS2018-06-044-1/+560
| | | | | | | | | | | CPUID F6x will not support all MSRs on intel_pentium4_later. Removed from pentium4_later and added as Pentium D. Change-Id: Ic6ac0593607b6f87fe921ac52738dad5ee3457dc Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/26289 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
* msrtool: add VIA C7Lubomir Rintel2018-05-154-1/+479
| | | | | | | | | Change-Id: I67c4f579f898a709dde3fab6bab1474a721da770 Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Reviewed-on: https://review.coreboot.org/18258 Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* util/msrtool: Check for VENDOR_AMD for K8 probeKyösti Mälkki2018-05-151-1/+1
| | | | | | | | | Change-Id: Icc3973dfc7217ca649fb4151ccdea5461a550bb8 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/26272 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Nico Huber <nico.h@gmx.de>
* util/msrtool: Fix swapped IA32_MC3_x and IA32_MC4_xKyösti Mälkki2018-05-157-37/+37
| | | | | | | | | | | | | | | | | | Registers IA32_MCi_xx are defined as architectural MSRs since "P6 Family Processors" and should have model-agnostic indexing. Note that in IA32 architecture manual, names of these MSRs are similarly swapped in the table of Intel Core Microarchitecture. I take this is an error in the documentation only, and it got copy-pasted across different CPU family files in the utility. Change-Id: I227102875b5c3d6ac144ed23a3085f3c37dabd4a Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/26269 Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* util/msrtool: Fix names from IA32_MCO_xx to IA32_MC0_xxKyösti Mälkki2018-05-153-9/+9
| | | | | | | | | Change-Id: I46cd986f4914b214156da49db37ecfa749386ce8 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/26268 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Nico Huber <nico.h@gmx.de>
* msrtool: use a bit more clever cpuid vendor matchLubomir Rintel2018-05-152-3/+3
| | | | | | | | | | Not everything non-intel is AMD. Change-Id: I06d6fbaa0b4f2c9e61d9b3b4aeeb349a91aa090e Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Reviewed-on: https://review.coreboot.org/18255 Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* msrtool: add support for printing string valuesLubomir Rintel2018-05-132-1/+25
| | | | | | | | | | | The VIA CPUs allow setting the CPUID vendor, which is best read as a character string. Change-Id: I67f77ca75f7d77e47b3ba09bad904df5805e373a Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Reviewed-on: https://review.coreboot.org/18257 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
* mstrool: only use intel targets for actual intel CPUsLubomir Rintel2018-05-139-10/+23
| | | | | | | | | | | VIA c3 & C7 use the the family of 0x6 and model 10, but are not quite Pentium III. Change-Id: I85e9853b42cfd20db46db0bd244620d6813bc826 Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Reviewed-on: https://review.coreboot.org/18256 Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* util/msrtool: Exit program after displaying the help messageMaciej Suminski2017-08-221-1/+1
| | | | | | | | | | | | In case there is no mode selected, sys and cpu variables are not initialized, causing a segfault on exit (goto done). Change-Id: I4a183c267e306598627c1612f4633f1e19019f3c Signed-off-by: Maciej Suminski <maciej.suminski@cern.ch> Reviewed-on: https://review.coreboot.org/21026 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Pratikkumar V Prajapati <pratikkumar.v.prajapati@intel.com>
* msrtool: Remove `no-pic` from `CFLAGS`Paul Menzel2017-06-091-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 7c634ae8 (msrtool: added support for Intel CPUs) adds `no-pic` to the compiler flags. GCC 7.0.1 20170316 fails to built with the error below. ``` /usr/bin/ld: msrtool.o: relocation R_X86_64_32 against `.rodata.str1.1' can not be used when making a shared object; recompile with -fPIC /usr/bin/ld: msrutils.o: relocation R_X86_64_32 against `.rodata.str1.1' can not be used when making a shared object; recompile with -fPIC /usr/bin/ld: sys.o: relocation R_X86_64_32 against `.rodata.str1.1' can not be used when making a shared object; recompile with -fPIC /usr/bin/ld: linux.o: relocation R_X86_64_32 against `.rodata.str1.1' can not be used when making a shared object; recompile with -fPIC /usr/bin/ld: freebsd.o: relocation R_X86_64_32S against `.data' can not be used when making a shared object; recompile with -fPIC /usr/bin/ld: final link failed: Nonrepresentable section on output ``` Removing the flag causes the build to succeed with GCC 7, 6.3, and clang 4.0. Change-Id: I3d7aed27ce7f84aa27305c68e2d5f14607c58ec8 Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: https://review.coreboot.org/18907 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Tauner <stefan.tauner@gmx.at> Reviewed-by: David Hendricks <david.hendricks@gmail.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
* Use more secure HTTPS URLs for coreboot sitesPaul Menzel2017-06-072-2/+2
| | | | | | | | | | | | | | | | | | | The coreboot sites support HTTPS, and requests over HTTP with SSL are also redirected. So use the more secure URLs, which also saves a request most of the times, as nothing needs to be redirected. Run the command below to replace all occurences. ``` $ git grep -l -E 'http://(www.|review.|)coreboot.org' | xargs sed -i 's,http://\(.*\)coreboot.org,https://\1coreboot.org,g' ``` Change-Id: If53f8b66f1ac72fb1a38fa392b26eade9963c369 Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: https://review.coreboot.org/20034 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
* util/msrtool: Use tabs for indentsElyes HAOUAS2016-10-191-12/+12
| | | | | | | | | | Change-Id: Ib1aa4ad04dc8a584a751677aac5652cfa2e457df Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/17031 Tested-by: build bot (Jenkins) Reviewed-by: Alexander Couzens <lynxis@fe80.eu> Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
* util/msrtool: update register for Pentium4_laterElyes HAOUAS2016-07-281-61/+412
| | | | | | | | | | | | Update MSR's registers regarding "Intel® 64 and IA-32 Architectures Software Developer’s Manual"- April 2015. "64-ia-32-architectures-software-developer-manual-325462.pdf" Change-Id: I71e399c4a6fef9de6a5581b64a6918660b2f8445 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/15798 Tested-by: build bot (Jenkins) Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
* msrtool/README: Remove trailing spacesElyes HAOUAS2016-07-281-3/+3
| | | | | | | | | Change-Id: I8b7d2263591608e0ab9504262bb06eac4cb52850 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/15779 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
* msrtool/configure: change svn to gitIru Cai2015-12-141-1/+1
| | | | | | | | Change-Id: I212e44fc7edfd1458b04fb42a8e964a3367dd72d Signed-off-by: Iru Cai <mytbk920423@gmail.com> Reviewed-on: https://review.coreboot.org/12710 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
* tree: drop last paragraph of GPL copyright headerPatrick Georgi2015-10-3122-88/+0
| | | | | | | | | | | | | | | | It encourages users from writing to the FSF without giving an address. Linux also prefers to drop that and their checkpatch.pl (that we imported) looks out for that. This is the result of util/scripts/no-fsf-addresses.sh with no further editing. Change-Id: Ie96faea295fe001911d77dbc51e9a6789558fbd6 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/11888 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
* Remove empty lines at end of fileElyes HAOUAS2015-06-084-6/+0
| | | | | | | | | | | | Used command line to remove empty lines at end of file: find . -type f -exec sed -i -e :a -e '/^\n*$/{$d;N;};/\n$/ba' {} \; Change-Id: I816ac9666b6dbb7c7e47843672f0d5cc499766a3 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: http://review.coreboot.org/10446 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
* Remove address from GPLv2 headersPatrick Georgi2015-05-2122-22/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As per discussion with lawyers[tm], it's not a good idea to shorten the license header too much - not for legal reasons but because there are tools that look for them, and giving them a standard pattern simplifies things. However, we got confirmation that we don't have to update every file ever added to coreboot whenever the FSF gets a new lease, but can drop the address instead. util/kconfig is excluded because that's imported code that we may want to synchronize every now and then. $ find * -type f -exec sed -i "s:Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, *MA[, ]*02110-1301[, ]*USA:Foundation, Inc.:" {} + $ find * -type f -exec sed -i "s:Foundation, Inc., 51 Franklin Street, Suite 500, Boston, MA 02110-1335, USA:Foundation, Inc.:" {} + $ find * -type f -exec sed -i "s:Foundation, Inc., 59 Temple Place[-, ]*Suite 330, Boston, MA *02111-1307[, ]*USA:Foundation, Inc.:" {} + $ find * -type f -exec sed -i "s:Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.:Foundation, Inc.:" {} + $ find * -type f -a \! -name \*.patch \ -a \! -name \*_shipped \ -a \! -name LICENSE_GPL \ -a \! -name LGPL.txt \ -a \! -name COPYING \ -a \! -name DISCLAIMER \ -exec sed -i "/Foundation, Inc./ N;s:Foundation, Inc.* USA\.* *:Foundation, Inc. :;s:Foundation, Inc. $:Foundation, Inc.:" {} + Change-Id: Icc968a5a5f3a5df8d32b940f9cdb35350654bef9 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/9233 Tested-by: build bot (Jenkins) Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
* utils/msrtool: add westmere cpuids to nehalemAlexander Couzens2015-02-111-1/+4
| | | | | | | | | | | Westmere's are nehalem's in 32nm Change-Id: I529194d50dbe3f585faee14961542433ea96ab75 Signed-off-by: Alexander Couzens <lynxis@fe80.eu> Reviewed-on: http://review.coreboot.org/8293 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Peter Stuge <peter@stuge.se>
* msrtool: Fix verbose ignored by cpuid().Benoît Legat2013-07-081-1/+3
| | | | | | | | | | | This is a trivial patch moving cpuid() call after reading argv so that verbose is set. Change-Id: Ic621191ef650495614a041413c1a0f707d4469e6 Signed-off-by: Benoît Legat <benoit.legat@gmail.com> Reviewed-on: http://review.coreboot.org/3627 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
* Intel Atom cpu support to msrtoolOlivier Langlois2013-06-065-2/+1155
| | | | | | | | | | | | | | Added support for Intel Atom cpu to msrtool Fixed a cut&paste error in nehalem msr bits definition It has been tested with a N455 cpu and msrtool output can be review at: http://www.trillion01.com/coreboot/msrtool_atom.txt Change-Id: I0ecf455b559185e2d16fa1a655bf021efc2ef537 Signed-off-by: Olivier Langlois <olivier@olivierlanglois.net> Reviewed-on: http://review.coreboot.org/3351 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
* GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«Paul Menzel2013-03-0121-21/+21
| | | | | | | | | | | | | | | | | In the file `COPYING` in the coreboot repository and upstream [1] just one space is used. The following command was used to convert all files. $ git grep -l 'MA 02' | xargs sed -i 's/MA 02/MA 02/' [1] http://www.gnu.org/licenses/gpl-2.0.txt Change-Id: Ic956dab2820a9e2ccb7841cab66966ba168f305f Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: http://review.coreboot.org/2490 Tested-by: build bot (Jenkins) Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
* msrtool: Decoding for most of Intel Core 2 MSRsAnton Kochkov2013-01-281-47/+808
| | | | | | | | | | | | | Added bits/bitfields descriptions and decoding values into intel_core2_later.c file, which describe MSRs for Intel processors, based on later Core 2 architecture. Change-Id: If577c8ed944afe34f86944cc03a780fba6b3dbba Signed-off-by: Anton Kochkov <anton.kochkov@gmail.com> Reviewed-on: http://review.coreboot.org/1171 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
* msrtool: Factor out cpuid() from target probe functions into main()Anton Kochkov2012-07-2114-49/+41
| | | | | | | | | | | | | | | | Almost all probe functions called cpuid(). Those calls are replaced by a single cpuid() call in main() and a new parameter to the target probe functions with the cpuid() result. The vendor_t and struct cpuid_t definitions are moved closer to the top of msrtool.h and the vendor_t enum is reformatted to simplify addition of further values. Change-Id: Icd615636207499cfa46b8b99bf819ef8ca2d97c0 Signed-off-by: Anton Kochkov <anton.kochkov@gmail.com> Signed-off-by: Peter Stuge <peter@stuge.se> Reviewed-on: http://review.coreboot.org/1259 Tested-by: build bot (Jenkins)
* msrtool: add support for cs5536 LPC_SERIRQ (0x5140004e)Christian Gmeiner2012-07-131-0/+41
| | | | | | | | | | | | This register is helpful for porting new mainboards based on cs5536 southbridge. Change-Id: Iff3adc2c2fbc672c8541096756f95b3322f6ab19 Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com> Reviewed-on: http://review.coreboot.org/1211 Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com> Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
* msrtool: Add Intel Nehalem CPUs supportAnton Kochkov2012-07-104-1/+2287
| | | | | | | | | | | Added Intel processors based on Nehalem architecture support, with decoding MSRs. Change-Id: I576d5eac2542c0b62852bf05e42bc98b134c7eae Signed-off-by: Anton Kochkov <anton.kochkov@gmail.com> Reviewed-on: http://review.coreboot.org/1170 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
* msrtool: Fix Intel CPUs detectionAnton Kochkov2012-07-108-7/+35
| | | | | | | | | | | Added vendor check in sys.c file and fixed models checking in intel targets files. Change-Id: I1ce52bbce431dea79e903d6bc7a12e5b9ad061be Signed-off-by: Anton Kochkov <anton.kochkov@gmail.com> Reviewed-on: http://review.coreboot.org/1169 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
* msrtool: added support for Intel CPUsAnton Kochkov2011-06-2810-2/+2380
| | | | | | | | Change-Id: I05f54471665aa99335a88d097c6de20174f91dc6 Signed-off-by: Anton Kochkov <anton.kochkov@gmail.com> Reviewed-on: http://review.coreboot.org/50 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
* msrtool: Update to use DirectHW on Mac OS XStefan Reinauer2011-03-144-6/+6
| | | | | | | | | | http://www.coreboot.org/DirectHW Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6443 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add Geode GX2 memmory descriptors. ↵Nils Jacobs2011-01-192-0/+1224
| | | | | | | | | | | Add a simple README file. Signed-off-by: Nils Jacobs <njacobs8@hetnet.nl> Acked-by: Stefan Reinauer <stepan@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6274 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* msrtool: Print hex values using only as many digits as the field needsPeter Stuge2010-05-171-1/+23
| | | | | | | | Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5566 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* msrtool: Remove some unneeded castsPeter Stuge2010-05-171-3/+3
| | | | | | | | Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5565 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Since some people disapprove of white space cleanups mixed in regular commitsStefan Reinauer2010-04-273-3/+3
| | | | | | | | | | | | while others dislike them being extra commits, let's clean them up once and for all for the existing code. If it's ugly, let it only be ugly once :-) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5507 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* msrtool: Fix typoPaul Menzel2010-01-171-1/+1
| | | | | | | | | Trivial! Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5034 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* msrtool: Read both MSR values from file in diff modePeter Stuge2010-01-171-22/+37
| | | | | | | | | | | | | | | | | | | Previously, msrtool would assume that MSR values should be compared between stored value in file and current value in hardware which msrtool was running on. This does not always fit the use case and with this change msrtool can now compare two sets of MSR values stored in a file. If only one MSR value is stored in the file, msrtool will behave as before, and read the second MSR value from hardware. This change means that msrtool does not always need access to the system MSR functions so it can now be run as a regular user when using diff mode with both MSR values stored in the file. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5033 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* msrtool: Add endptr to str2msr() showing how many characters were parsedPeter Stuge2010-01-173-7/+8
| | | | | | | | | | | | | | | | | | | | This also introduces a small change in the user interface for immediate mode (-i). Previously, whitespace could separate high and low words in an MSR as such: msrtool -i 4c00000f='f2f100ff 56960004' That is no longer allowed, a space character now ends the MSR value. Any other character can still be used as separator however, so the following syntax still works as expected: msrtool -i 4c00000f=f2f100ff:56960004 Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5032 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* msrtool: More trivial rearrangementPeter Stuge2010-01-161-14/+13
| | | | | | | | | | | Rename some variables Remove the 'found' variable which turns out not to be needed anyway Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5024 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* msrtool: Remove indent by using continue inside for() to avoid an if blockPeter Stuge2010-01-161-13/+14
| | | | | | | | | | | | | | | | The only actual code change is from if (.. >= 1) { } to if (.. < 1) continue so this is pretty trivial. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5020 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* (missing svn add)Nils Jacobs2010-01-151-0/+519
| | | | | | | | | | | | | Support for the AMD Geode GX2 Processors to Msrtool. It seems to work as it was tested on a Wyse Winterm S50. Signed-off-by: Nils Jacobs <njacobs8@hetnet.nl> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5009 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Support for the AMD Geode GX2 Nils Jacobs2010-01-153-1/+6
| | | | | | | | | | | | Processors to Msrtool. It seems to work as it was tested on a Wyse Winterm S50. Signed-off-by: Nils Jacobs <njacobs8@hetnet.nl> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5008 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* msrtool: Fix simple breakage in r4964Peter Stuge2009-11-281-1/+1
| | | | | | | | Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4966 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* msrtool: Add FreeBSD support using /dev/cpuctl ioctl interfaceAndriy Gapon2009-11-284-1/+117
| | | | | | | | Signed-off-by: Andriy Gapon <avg@icyb.net.ua> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4965 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* msrtool: Make configure more POSIX sh friendlyAndriy Gapon2009-11-281-8/+8
| | | | | | | | | | | | Change a few bash-specific constructs to more portable syntax specified by POSIX. After the change the script keeps working with bash interpreter and can also be interpreted by FreeBSD /bin/sh. Signed-off-by: Andriy Gapon <avg@icyb.net.ua> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4964 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* msrtool: Actually do PREFIX substitution in MakefilePeter Stuge2009-11-281-2/+2
| | | | | | | | Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4963 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Remove commented out example MSR definitionsPeter Stuge2009-11-262-13/+0
| | | | | | | | | | Now there are definitions for actual MSRs that can be referenced instead. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4958 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add the following GeodeLX memory controller MSRsNathan Williams2009-11-261-0/+292
| | | | | | | | | | | | | | | | 0x20000018 MC_CF07_DATA 0x20000019 MC_CF8F_DATA 0x2000001a MC_CF1017_DATA 0x2000001b MC_CFPERF_CNT1 0x2000001c MC_PERFCNT2 0x2000001d MC_CFCLK_DBUG Signed-off-by: Nathan Williams <nathan@traverse.com.au> Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Nathan Williams <nathan@traverse.com.au> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4957 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-18 17:35:12 +0000