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* util/bincfg: Add MAC address example to gbe-ich9m.setEvgeny Zinoviev2021-02-091-1/+9
| | | | | | | | | | | | | It's not obvious how to set specific byte of a multi-byte field in the set file. Add an example (and a template) for setting MAC address. Change-Id: Iea983071682ffebd61757497d43c70cc8214043d Signed-off-by: Evgeny Zinoviev <me@ch1p.io> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39664 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Swift Geek (Sebastian Grzywna) <swiftgeek@gmail.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Jacob Garber <jgarber1@ualberta.ca>
* util/autoport: Fix a typo in readme.mdEvgeny Zinoviev2021-02-071-1/+1
| | | | | | | | Change-Id: Ifa1e751354c644e2ad9613253b90eb5db0a1f043 Signed-off-by: Evgeny Zinoviev <me@ch1p.io> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50306 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* amdfwtool:cezanne: Add entry of PSP_BOOTLOADER_AB (0x73)Zheng Bao2021-02-033-0/+5
| | | | | | | | Change-Id: Ie3577b403c1de7f20b6d5bcf9e1a5d47450266fe Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50227 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
* util/vboot_lib: Add description.mdKyösti Mälkki2021-01-311-0/+1
| | | | | | | | | | | Fixes lint-stable-025 error. Change-Id: I4aa2b2a2ffca69f894a23d7487926016830c9e4f Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50114 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* util/testing/Makefile.inc: Fix up license headerAngel Pons2021-01-301-2/+0
| | | | | | | | | | | Drop unnecessary leading empty lines in comment. Change-Id: Idc0f9d1548336dc2df2d59b18af8d717efa60b68 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49955 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Christian Walter <christian.walter@9elements.com>
* docker/coreboot-jenkins-node: Add GNU parallelPatrick Georgi2021-01-291-0/+1
| | | | | | | | | Change-Id: I958e65f3c758e7e46d6b628a05009c1b4727d40a Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50087 Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* util/lint: Add test for documentation in util dirsMartin Roth2021-01-281-0/+16
| | | | | | | | | | | Make sure that any new directories added to the util directory get documentation added. Signed-off-by: Martin Roth <martin@coreboot.org> Change-Id: I8bb415c72cf05b91c84f0a945d7767134a74c44c Reviewed-on: https://review.coreboot.org/c/coreboot/+/48967 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* Update util.md documentationMartin Roth2021-01-281-2/+17
| | | | | | | | | | This is the new output of the util_readme.sh script. Signed-off-by: Martin Roth <martin@coreboot.org> Change-Id: Ia46924474f75692192ef4b52aab714f5071f9534 Reviewed-on: https://review.coreboot.org/c/coreboot/+/48966 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* docker/coreboot-jenkins-node: Add zephyr-sdk toolchainPatrick Georgi2021-01-281-0/+8
| | | | | | | | | | | | | | There are efforts to replace Chrome EC with Zephyr. To ensure Chromebook specific Zephyr developments (that can eventually be built as part of a coreboot build just like Chrome EC now, and are built with coreboot-sdk) don't break with Zephyr's toolchain, add the toolchain to our builders so we can do some sanity checking. Change-Id: I645a298bc350ebe7651c08aea630bdc6b93856aa Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49986 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
* util/docker: Split build into multiple partsPatrick Georgi2021-01-281-8/+17
| | | | | | | | | | | | | Take the test build entirely out of the image creation process. This also allows splitting up the build steps a bit, providing more break points in case some build/test fails. Change-Id: Ie05d4a09f79350fd3e5415430da1edbcb3bcb443 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49985 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* util/docker: Don't try to test-build non-existing crostools targetPatrick Georgi2021-01-281-1/+0
| | | | | | | | | Change-Id: Id6afbff1fd91744da3ba1d5e3e9aa339c46b29b3 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49984 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* gitconfig/test: Adapt test to current tree layoutPatrick Georgi2021-01-281-1/+1
| | | | | | | | | | | | | The test expects a README file to exist under revision control, but we converted it to markdown, together with a rename over 2 years ago in commit ee8780eb7880477. Change-Id: I7768e116a10cb373ca35fa1c874a5949dabaa111 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49982 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* util/amdfwtool: Add "all" target to MakefilePatrick Georgi2021-01-281-0/+1
| | | | | | | | | | | The test-tools make target requires it. Change-Id: I20819f8d587e6b3a472cdc32751e9edf505d5ba6 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49962 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* docker/coreboot-sdk: clone coreboot submodules when doing test buildPatrick Georgi2021-01-281-0/+1
| | | | | | | | Change-Id: I2315beda31bdc8edc92d21b6665eb5ebd07da2e6 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49961 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
* superiotool: Add ID for Nuvoton NCT6797DClay2021-01-271-0/+50
| | | | | | | | | | | | | | | Test Result: clay@clay-MS-7C37:~$ sudo superiotool [sudo] password for clay: superiotool r4.13-823-g221351f81b Found Nuvoton NCT6797D (id=0xd451) at 0x4e Change-Id: I1a5f962f2fd9dc479ddbbaf5e1bebea2c7c9e03f Signed-off-by: Clay <clay.daniels.jr@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49112 Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* util/board_status/board_status.sh: invoke md5 on FreeBSDIdwer Vollering2021-01-251-1/+8
| | | | | | | | Signed-off-by: Idwer Vollering <vidwer@gmail.com> Change-Id: I8d9493ce0c3fa97ea9c3c2f60a0106bb98bd8315 Reviewed-on: https://review.coreboot.org/c/coreboot/+/49309 Reviewed-by: David Hendricks <david.hendricks@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* util/board_status/board_status.sh: improve mktemp behaviour on non-linux OSesIdwer Vollering2021-01-251-1/+8
| | | | | | | | Signed-off-by: Idwer Vollering <vidwer@gmail.com> Change-Id: I763b0e7c7c81a2447ed20db0a25047d106e30606 Reviewed-on: https://review.coreboot.org/c/coreboot/+/49308 Reviewed-by: David Hendricks <david.hendricks@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* util/board_status/board_status.sh: improve getopt detection and usage onIdwer Vollering2021-01-251-2/+16
| | | | | | | | | | non-linux OSes Signed-off-by: Idwer Vollering <vidwer@gmail.com> Change-Id: Iba50d8a8609eda974f12b0d9802e04d7371aed5b Reviewed-on: https://review.coreboot.org/c/coreboot/+/49307 Reviewed-by: David Hendricks <david.hendricks@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* util/board_status/board_status.sh: select the right gnu make binaryIdwer Vollering2021-01-251-3/+17
| | | | | | | | Signed-off-by: Idwer Vollering <vidwer@gmail.com> Change-Id: I4523b1b235064f89c01530b47c9cb4c3c11c9761 Reviewed-on: https://review.coreboot.org/c/coreboot/+/49306 Reviewed-by: David Hendricks <david.hendricks@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* util: Update all shebangs to use /usr/bin/envMartin Roth2021-01-2554-54/+54
| | | | | | | | | | | | Instead of hardcoding paths to the executables, use the version in the path. This allows the scripts to work on more systems, and allows the binary version to be changed more easily if needed. Signed-off-by: Martin Roth <martin@coreboot.org> Change-Id: Ifcc56aa21092cd3866eacb6a02d198110ec6051d Reviewed-on: https://review.coreboot.org/c/coreboot/+/48904 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* util/crossgcc: Remove obsolete dockerfileMartin Roth2021-01-251-37/+0
| | | | | | | | | | | This file was added here before util/docker existed. Anyone using this dockerfile should use the coreboot-sdk docker container instead. Signed-off-by: Martin Roth <martin@coreboot.org> Change-Id: I7114abc9c91ba2d6fcfef80ae6e7d1a7a3d253cf Reviewed-on: https://review.coreboot.org/c/coreboot/+/48902 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* util/docker: Replace all variables in DockerfileMartin Roth2021-01-221-4/+4
| | | | | | | | | | | | | When updating the variables in the dockerfile, if there were two or more variables on a line, only the first would be updated. This fixes that issue. Change-Id: I011ccb299c7c8527b79d234075cab18be998ab43 Signed-off-by: Martin Roth <gaumless@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47339 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* sconfig: Handle smbios_slot_desc in overridetreeFrans Hendriks2021-01-221-0/+12
| | | | | | | | | | | | | | | | | SMBIOS slot information in overrridetree is not overriden if device already exist in devicetree. Add support to handle this information from override. BUG= N/A TEST= Verify generated static.c on Intel Coffee Lake CRB Change-Id: I532436aee1d71b79171463124f7b205c145d5b05 Signed-off-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49738 Reviewed-by: Wim Vervoorn <wvervoorn@eltan.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* msrtool: fix build with gcc 10.Michal Suchanek2021-01-211-2/+2
| | | | | | | | | | | | | [ 84s] /usr/lib/gcc/i586-suse-linux/10/../../../../i586-suse-linux/bin/ld: msrutils.o:(.bss+0x0): multiple definition of `PresentTypes'; msrtool.o:(.bss+0x14): first defined here [ 84s] /usr/lib/gcc/i586-suse-linux/10/../../../../i586-suse-linux/bin/ld: msrutils.o:(.bss+0x4): multiple definition of `MsrTypes'; msrtool.o:(.bss+0x18): first defined here There should be typedefs, not variable definitions. Change-Id: I663a011e9f1fc169126570d5eac7abe82d204a90 Signed-off-by: Michal Suchanek <msuchanek@suse.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49648 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Idwer Vollering <vidwer@gmail.com>
* util/lint/spelling.txt: Disable `pres`Angel Pons2021-01-171-1/+3
| | | | | | | | | | | | | | | It would seem that `pres` is an abbreviation for `presence`. Personally, over the last ~2.5 years, I have seen checkpatch complaints about `pres` on several occasions, and all of them were abbreviations for `presence`. Given the high false positive rate for this entry, comment it out. Change-Id: I72f1811fb1f766e7de7c4957fd9ba844c0728029 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49463 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* util/cbfstool: unbreak compilation on FreeBSDIdwer Vollering2021-01-131-0/+2
| | | | | | | | | | | | Compilation has been broken in commit I022468f6957415ae68a7a7e70428ae6f82d23b06 Adding a missing define solved this. See https://cgit.freebsd.org/src/tree/sys/sys/fcntl.h#n319 Signed-off-by: Idwer Vollering <vidwer@gmail.com> Change-Id: I3433e4c9269880d3202dd494e5b2e962757a6b87 Reviewed-on: https://review.coreboot.org/c/coreboot/+/49314 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
* util/superiotool: add IT5570E registersMichael Niewöhner2021-01-131-0/+54
| | | | | | | | | | | | Add registers from IT5570E datsheet v0.3.1. Tested on Clevo L141CU. Change-Id: Idc764c6180e235298835d7639fcb0b562a2c21a4 Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48922 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* util/ifdtool: Add coreboot build system supportPatrick Georgi2021-01-121-0/+18
| | | | | | | | | | | | | When building as part of the coreboot build system, use the same mechanism as other tools (cbfstool, amdfwtool, ...) so that abuild builds ifdtool once into sharedutils instead of once per board (while avoiding other race conditions, too). Change-Id: I42c7b43cc0859916174d59cba6b62630e70287fd Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49312 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
* util/superiotool: Add IT8720F EC registersMichael Büchler2021-01-121-0/+29
| | | | | | | | | | | | | Registers and their default values are from the datasheet ("IT8720F", "Preliminary Specification V0.1"). Tested on an Acer G43T-AM3. Signed-off-by: Michael Büchler <michael.buechler@posteo.net> Change-Id: I69987be4f5cb50b3c20f06733f30b308891d5ad0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/44985 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
* util/sconfig: Emit chip config pointers for PCI devices on root busFurquan Shaikh2021-01-111-5/+20
| | | | | | | | | | | | | | | This change emits chip config pointers for PCI devices on root bus in static_devices.h so that the config structure can be accessed directly without having to reference the device structure. This allows the linker to optimize out unused parts of the device tree from early stages like bootblock. Change-Id: I1d42e926dbfae14b889ade6dda363d8607974cae Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49214 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* util/sconfig: Change __pci*|__pnp* device pointers to constFurquan Shaikh2021-01-111-4/+4
| | | | | | | | | | | | | | This change updates the device pointers exposed in static_devices.h to const instead of DEVTREE_CONST. The pointer itself doesn't really need to be DEVTREE_CONST. Change-Id: I061b05d994fc5c4156ee8bddabadf940f0aeeac3 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49242 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
* superiotool/nuvoton: Set NCT6791D GPIO inputs to NANANico Huber2021-01-101-3/+3
| | | | | | | | | | | | | | There were several default values given for GPIO data and status registers. As all GPIO are configured as inputs by default, we can't predict the values of these registers, hence set their default values to NANA. Change-Id: I0507dd75e0f2a5c7e4d2e9cdbe1f860b544deac3 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49241 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Clay Daniels <clay.daniels.jr@gmail.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* util/autoport: Rename to mainboard_fill_gnvs()Kyösti Mälkki2021-01-102-3/+4
| | | | | | | | Change-Id: Ia8d7083ca2f21abbb5f184c1b55dcf1bf047a7be Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49231 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* util/amdfwtool,post: add missing distclean targetFelix Held2021-01-082-0/+4
| | | | | | | | | | | Without this target some spurious errors occurred when running make distclean at the top level of coreboot. Change-Id: I3d3061b386fc5b4a043cfc7ff8fd3c0da33c0e83 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49227 Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* util/testing: remove genprof targetFelix Held2021-01-081-1/+0
| | | | | | | | | | | | | commit 8c99c27df10f6c5a120e41ffb0948e357f5a2d20 removed util/genprof, so it needs to be dropped here as well to avoid spurious breakages of the build. Change-Id: I420b5c43e2d97373a8e665f457463a06e16ecfb9 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49226 Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Felix Singer <felixsinger@posteo.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* util/crossgcc/.gitignore: Add cmakeArthur Heymans2021-01-081-0/+2
| | | | | | | | | | Change-Id: I5ce346515f4468699396e214acfaa3b62f6d891d Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49115 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* cbfstool: Use flock() when accessing CBFS filesJulius Werner2021-01-081-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | Trying to do multiple operations on the same CBFS image at the same time likely leads to data corruption. For this reason, add BSD advisory file locking (flock()) to cbfstool (and ifittool which is using the same file I/O library), so that only one process will operate on the same file at the same time and the others will wait in line. This should help resolve parallel build issues with the INTERMEDIATE target on certain platforms. Unfortunately, some platforms use the INTERMEDIATE target to do a direct dd into the CBFS image. This should generally be discouraged and future platforms should aim to clearly deliminate regions that need to be written directly by platform scripts with custom FMAP sections, so that they can be written with `cbfstool write`. For the time being, update the legacy platforms that do this with explicit calls to the `flock` utility. Signed-off-by: Julius Werner <jwerner@chromium.org> Change-Id: I022468f6957415ae68a7a7e70428ae6f82d23b06 Reviewed-on: https://review.coreboot.org/c/coreboot/+/49190 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Furquan Shaikh <furquan@google.com>
* cpu/intel/model_206ax: Rename `cX_acpower` optionsAngel Pons2021-01-061-3/+3
| | | | | | | | | | They aren't specific to AC power operation anymore. Also adapt autoport. Change-Id: Ib04d0a08674b7d2773d440d39bd6dfbd4359e0fb Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49089 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* cpu/intel/model_206ax: Unify ACPI C-state optionsAngel Pons2021-01-061-3/+0
| | | | | | | | | | | | | | | | All mainboards use the same values for AC and battery, even desktop boards without a battery. Use the AC values everywhere and drop the battery values. Subsequent commits will rename the AC power options accordingly, and will also clean up the corresponding acpigen code. This is intentional so as to ease reviewing the devicetree changes. Also update util/autoport accordingly. Change-Id: I581dc9b733d1f3006a4dc81d8a2fec255d2a0a0f Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49088 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* util/testing: Build test more of our toolsPatrick Georgi2021-01-061-0/+4
| | | | | | | | | | | | https://qa.coreboot.org/job/untested-coreboot-files reports a bunch of untouched Makefiles, so we never even attempt to build those tools. Change-Id: I70ca658d9642b84fa8388c72ecb83327a6a74291 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47446 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Felix Singer <felixsinger@posteo.net>
* drivers/vpd: Add VPD region to default FMAP when selectedMatt DeVillier2021-01-041-0/+1
| | | | | | | | | | | | | | | | | | Currently, use of the VPD driver to read VPD tables from flash requires the use of a custom FMAP with one or more VPD regions. Extend this funtionality to boards using the default FMAP by creating a dedicated VPD region when the driver is selected. Test: build qemu target with CONFIG_VPD selected, verify entry added to build/fmap.fmd. Change-Id: Ie9e3c7cf11a6337a43223a6037632a4d9c84d988 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49049 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* util: Make sure all util dirs have description files at top levelMartin Roth2021-01-046-1/+24
| | | | | | | | | | | | | New util directories have been added with no description.md file. The description file for supermicro was added at a secondary level, which doesn't help a user find the util since no path was added. Move it up to the top level. Signed-off-by: Martin Roth <martin@coreboot.org> Change-Id: I40b4c25dd7706513e96c6b8078a34160f8bb901e Reviewed-on: https://review.coreboot.org/c/coreboot/+/48961 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tom Hiller <thrilleratplay@gmail.com>
* util/amdfwtool: portability fixes for FreeBSDIdwer Vollering2020-12-313-8/+2
| | | | | | | | | | Add the stdint.h header, and drop the GLIBC section from amdfwtool.h to build this tool on FreeBSD as well as Linux. Signed-off-by: Idwer Vollering <vidwer@gmail.com> Change-Id: I295fd308b0f5e2902931f02c9455823a614976de Reviewed-on: https://review.coreboot.org/c/coreboot/+/48977 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* util/xcompile: fix XGCCPATH handlingrnhmjoj2020-12-291-1/+1
| | | | | | | | | | | | | | | | | | This patch fixes the build with an external (coreboot) toolchain. When the toolchain is not under util/crossgcc/xgcc, setting XGCCPATH to /path/to/toolchain results in the error: toolchain.inc:169: The coreboot toolchain version of iasl '<date>' was not found The reason is that the xcompile script incorrectly assumes XGCCPATH to have a trailing slash. Change-Id: Ifcc4bd2b081fa3603420dc0a8cab3b47967ebc65 Signed-off-by: Michele Guerini Rocco <rnhmjoj@inventati.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48937 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* device + util/sconfig: introduce new device `gpio`Michael Niewöhner2020-12-286-402/+312
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce a new device `gpio` that is going to be used for generic abstraction of gpio operations in the devicetree. The general idea behind this is that every chip can have gpios that shall be accessible in a very generic way by any driver through the devicetree. The chip that implements the chip-specific gpio operations has to assign them to the generic device operations struct, which then gets assigned to the gpio device during device probing. See CB:48583 for how this gets done for the SoCs using intelblocks/gpio. The gpio device then can be added to the devicetree with an alias name like in the following example: chip soc/whateverlake device gpio 0 alias soc_gpio on end ... end Any driver that requires access to this gpio device needs to have a device pointer (or multiple) and an option for specifying the gpio to be used in its chip config like this: struct drivers_ipmi_config { ... DEVTREE_CONST struct device *gpio_dev; u16 post_complete_gpio; ... }; The device `soc_gpio` can then be linked to the chip driver's `gpio_dev` above by using the syntax `use ... as ...`, which was introduced in commit 8e1ea52: chip drivers/ipmi use soc_gpio as gpio_dev register "bmc_jumper_gpio" = "GPP_D22" ... end The IPMI driver can then use the generic gpio operations without any knowlege of the chip's specifics: unsigned int gpio_val; const struct gpio_operations *gpio_ops; gpio_ops = dev_get_gpio_ops(conf->gpio_dev); gpio_val = gpio_ops->get(conf->bmc_jumper_gpio); For a full example have a look at CB:48096 and CB:48095. This change adds the new device type to sconfig and adds generic gpio operations to the `device_operations` struct. Also, a helper for getting the gpio operations from a device after checking them for NULL pointers gets added. Successfully tested on Supermicro X11SSM-F with CB:48097, X11SSH-TF with CB:48711 and OCP DeltaLake with CB:48672. Change-Id: Ic4572ad8b37bd1afd2fb213b2c67fb8aec536786 Tested-by: Johnny Lin <Johnny_Lin@wiwynn.com> Tested-by: Michael Niewöhner <foss@mniewoehner.de> Tested-by: Patrick Rudolph <siro@das-labor.org> Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48582 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* Makefile: Add $(xcompile) to specify where to write xcompileRaul E Rangel2020-12-234-10/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This file was being written to the root src directory. It is the only file being written to src during a normal build, while all others are being written to $(obj). I added a new variable to allow specifying the xcompile path. This allows generating a single file if building multiple boards. I also moved the default location into $(obj) so we don't pollute the src directory by default. I also cleaned up the generation of xcompile by removing the unnecessary eval and NOCOMPILE check. I also left .xcompile in distclean so it cleans up stale files. Since .xcompile is written into $(obj), `make clean` will now remove it. The tegra Makefiles are outside of the normal build process, so I just updated those Makefiles to point to the default xcompile location of a normal build. The what-jenkins-does target had to be updated to support these special targets. We generate an xcompile specifically for these targets and pass it into the Makefile. Ideally we should get these targets added to the main build. BUG=b:112267918 TEST=ran `emerge-grunt coreboot` and `make what-jenkins-does` Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: Ia83f234447b977efa824751c9674154b77d606b0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/28101 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* amdfwtool: Add support of cezanne and renoirZheng Bao2020-12-213-15/+124
| | | | | | | | Change-Id: I9e932631e88062b4c385567ed2eff76eda6e10c4 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48525 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* util: Modify LPDDR4 spd_tools to generate SPDs for ADL boardsAmanda Huang2020-12-171-6/+7
| | | | | | | | | | | | | | | | Generates de-duplicated SPD files using a global memory part list provided by the mainboard in JSON format. BUG=b:173132516 Change-Id: I4964ec28d74ab36c6b6f2e9dce6c923d1df95c84 Signed-off-by: Amanda Huang <amanda_hwang@compal.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48526 Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Nick Vaccaro <nvaccaro@google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* autoport: Add a license header to non-empty filesIru Cai2020-12-174-1/+9
| | | | | | | | Change-Id: I8078d8babf24feabb22856ee820ab45b7d466f62 Signed-off-by: Iru Cai <mytbk920423@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45464 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* src/lib: Add Kconfig option for SPD cache in FMAPMatt DeVillier2020-12-141-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Currently, the option to cache DIMM SPD data in an FMAP region is closely coupled to a single board (google/hatch) and requires a custom FMAP to utilize. Loosen this coupling by introducing a Kconfig option which adds a correctly sized and aligned RW_SPD_CACHE region to the default FMAP. Add a Kconfig option for the region name, replacing the existing hard- coded instance in spd_cache.h. Change the inclusion of spd_cache.c to use this new Kconfig, rather than the board-specific one currently used. Lastly, have google/hatch select the new Kconfig when appropriate to ensure no change in current functionality. Test: build/boot WYVERN google/hatch variant with default FMAP, verify FMAP contains RW_SPD_CACHE, verify SPD cache used via cbmem log. Also tested on an out-of-tree Purism board. Change-Id: Iee0e7acb01e238d7ed354e3dbab1207903e3a4fc Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48520 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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