| Commit message (Collapse) | Author | Age | Files | Lines |
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Values as per "IT8772E Preliminary Specification V0.4 (For F Version)".
Some values are unclear on this document, but is the only one I have.
Change-Id: I6d74984f453c47d6ec71963a7dcab961a22a5964
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/30224
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
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Build tested on Ubuntu 18 LTS, FreeBSD.
Change-Id: Ida2c1f36aba7469d69dbb12ee6afce4a181bd6b7
Signed-off-by: Idwer Vollering <vidwer@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37766
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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Change-Id: I3d0ab7dacb5facb7dd14dd471cd0fb9f06bf0e37
Signed-off-by: Idwer Vollering <vidwer@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38228
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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The existing rule created a potential race condition between creating
the directory and putting files in there, so use our existing
infrastructure for directory creation instead.
Change-Id: If52a9f558c7d9ce85f71ba53232594699c9d357a
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37798
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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When regions are resized they are always aligned to the top of the
region. For the BIOS region this is correct. The other regions however
should be aligned to the bottom of the region.
Update the region handling to only align BIOS region to top of region.
BUG=N/A
TEST=verified image resize
Change-Id: Ied0e763b5335f5f124fc00de38e5db1a4d0f6785
Signed-off-by: Wim Vervoorn <wvervoorn@eltan.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38460
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
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Change-Id: I7fe3e798346e760eebb357f20e55ee1a71a1e31a
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38436
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
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Update the two flashrom URLs to use HTTPS. All other URLs are already
using HTTPS.
Change-Id: I8e9861b2748289522ab418960a463ae55ab0d2d3
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38435
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
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Change-Id: I2012f0adcb348a3ea6c50c361a49a0a600d3db3d
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38162
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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Change-Id: I81c6f4134610bcd35e173cdb002ef821788b0538
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38164
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Change-Id: Ic5f18669a04397f570d49c1ff056cd90b3eb04a1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38345
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Idwer Vollering <vidwer@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
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Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: I9241f96eed652c8ca72d4f4a94f860a875e55680
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36177
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
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According to intels datasheet
Document Number: 341078-001
10th Generation Intel® Core™ Processor Families
Volume 2 of 2
we can dump the ICL MCHBAR similiar as on 8th / 9th gen CPUs.
The difference is that on ICL the MCHBAR address is definited by
the bits 38:16 instead of 38:15 giving the constraint that it has
to be 64kbit instead of 32kbit aligned. (Section 3.1.13)
Change-Id: Ia597a4b3738c11cb48ce5808d8459b4a2a768077
Signed-off-by: Johanna Schander <coreboot@mimoja.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38211
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
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Build the smcbiosinfo tool with other tools.
Fixes possible race condition on jenkins.
Change-Id: I38f7ee2fdef2818ad685b3de53ad74f7da50600f
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38270
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Christian Walter <christian.walter@9elements.com>
Reviewed-by: ron minnich <rminnich@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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Change-Id: I8d1a6af6f1d70268f17692bee130c08502082c97
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37730
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
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Match each of the possible APCB items with a corresponding backup APCB.
A missing backup copy can prevent the system from booting.
Change-Id: I400194b2763239896214ea42cfe6fbeb8ed261a8
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38168
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
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The BMC and tools interacting with it depend on metadata placed inside
the ROM in order the flash the BIOS.
Add a new tool smcbiosinfo, integrate it into the build system, and
generate a 128byte metadata file called smcbiosinfo.bin on build.
You need to provide the BoardID for every SMC mainboard through a new
Kconfig symbol: SUPERMICRO_BOARDID
Some fields are unknown, but it's sufficient to flash it using SMC
vendor tools.
Tested on Supermicro X11SSH:
* Flashing using the WebUI works
* Flashing using SMCIPMITool works
No further validation is done on the firmware.
Change-Id: Id608c2ce78614b45a2fd0b26d97d666f02223998
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35484
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
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Properly build test AMD ports that rely on blobs, too.
Change-Id: Ia82f38d0e57f463ee33844c7afebb9dd602cef05
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38043
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
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In preparation to update to SPDX license headers, add identifiers
for the licenses seen in the coreboot project and create a command
line parameter allowing only SPDX license identifiers to be detected.
Here are example locations of these licenses:
Apache-2.0 - src/soc/sifive
BSD-3-Clause - Throughout coreboot & libpayload source
GPL-2.0-only - Throughout coreboot source
GPL-2.0-or-later - Throughout coreboot source
GPL-3.0-only - util/amdtools
GPL-3.0-or-later - src/lib/[gcov/libgcov/gnat]
ISC - src/lib/ubsan.c, soc/qualcomm/ipq806x/include/soc/gsbi.h, others
MIT - soc/nvidia/tegra210/mipi_dsi.c, files in mainboard/cavium/
X11 - include/device/drm_dp_helper.h, drivers/aspeed/common/ast_tables.h
Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: I07a7ca408ac8563e03e189d05ef7729dfb6fc24e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36175
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
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Change-Id: Ia4752391e1232ac67d8927778a3a94eec5c68410
Signed-off-by: Johanna Schander <coreboot@mimoja.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37986
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-by: Christoph Pomaska <github@aufmachen.jetzt>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Change-Id: If90193dc7c85133b10082c68a6cec6c1b0b35ffb
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37958
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Jacob Garber <jgarber1@ualberta.ca>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: Ia1cd7e12f12cb6d26a10fd358a3b32c31ce1c834
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37916
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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create_coreboot_variant.sh now supports the Volteer baseboard in
addition to Hatch. The shell script and supporting python code are
moved up one level, while retaining the ${BASE}/template/* file
structure for each supported baseboard.
kconfig.py has to add slightly different text to Kconfig.name
depending on which baseboard is selected.
BRANCH=None
BUG=b:146646594
TEST=Create variants of Hatch and Volteer, check that the staged
commits are correct.
$ ./create_coreboot_variant.sh hatch sushi b:12345
src/mainboard/google/hatch/Kconfig and Kconfig.name will have new
sections for SUSHI. src/mainboard/google/hatch/variants/sushi
will have a copy of util/mainboard/google/hatch/template
$ ./create_coreboot_variant.sh volteer ripto b:12345
src/mainboard/google/volteer/Kconfig and Kconfig.name will have new
sections for RIPTO. src/mainboard/google/volteer/variants/ripto
will have a copy of util/mainboard/google/volteer/template
Also run the script with an existing board name to verify that you
can't create a variant that already exists.
Change-Id: I084b6c50bb76af0d11dc86a96b3c3c434569a0dd
Signed-off-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37878
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
Reviewed-by: Marco Chen <marcochen@google.com>
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Finally all boards use a GCC compiled bootblock!
Change-Id: I0c9a1b19dbdc32b43875da7d685718bae9d7f5f4
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37337
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Jacob Garber <jgarber1@ualberta.ca>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Change-Id: Ia96bee18abcdf278ae9178471cd4af2de454facf
Signed-off-by: Idwer Vollering <vidwer@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37768
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
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Running the x86_64 qemu mainboard target with '-accel kvm' results in hang,
as the 'D' and 'A' bits needs to be set in read only page tables.
Tested on QEMU Q35: Boots into payload with '-accel kvm'.
Change-Id: I4beae8deec6bf34f9762e7b54c5da4e5b63f6d24
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36778
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Change-Id: I2867d62d2e6f5ca1e97ce52ecc45a794b4831686
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37834
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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The ApolloLake SoC allows two Logical Boot Partitions. This patch
introduces a '-s' optional parameter to select the second Logical
Boot Partition.
Change-Id: If32ec11fc7291d52b821bf95c1e186690d06ba11
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37660
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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If the compiler fails to inline all the FORCE_INLINE functions, it will
complain.
Change-Id: I7b8349c9a3d53c47ac189f02b296600abac8a0cf
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37734
Reviewed-by: Idwer Vollering <vidwer@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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This reverts commit 547de69de73629c051e9b5312f6369744ec6ce8f.
Merged out of order before CB:36317. The conflicting use of
_ADR and _HID needs to be properly addressed before we can
bump the IASL version.
Change-Id: Iacbc9877a8ff2324eba4789d65df8545b8a25413
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37713
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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cbfstool depends on vboot headers, and vboot expects to be able to use
modern C features like _Static_assert(). It just so happens that it
doesn't do that in any headers included from cbfstool right now, but
that may change. Let's switch cbfstool to a newer version to prevent
that from becoming a problem.
Change-Id: I884e1bdf4ec21487ddb1bca57ef5dc2104cf8e0e
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37666
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
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* GBB_HWID is no longer used in Hatch Kconfig, so remove the code
that creates the GBB_HWID and adds it to the Kconfig section
* Add more information in the usage message when the cmdline params
are incorrect.
* Remove messages that tell the user what to do, because the top-level
program that invokes this script will handle those commands, and so
this script telling the user what to do is noise (and possibly harmful)
* Add more information to the commit message that the script prepares
for the user.
* Bump script version number.
BRANCH=None
BUG=b:140261109
TEST=Create the "sushi" variant of the "hatch" baseboard:
`util/mainboard/google/hatch/create_coreboot_variant.sh sushi`
Inspect the files in src/mainboard/google/hatch/variants/sushi
Change-Id: I04e949aedce61ed7fc7df681b72c3cfef31b5513
Signed-off-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37647
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
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For prettier diagrams: http://ditaa.sourceforge.net/
Change-Id: Ic28dc5ea9d82ff6bf8654e2e33e675a536348654
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37646
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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Change-Id: Ife90b61d04e32f307a688d81922bdcf6fa57cfc9
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37572
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Change-Id: I638eda3040c7225aa4a8b492c8dc78b0e2effba1
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37369
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Changes: https://acpica.org/node/174
Change-Id: I72e44429f96c2ec82092c87aea46c3ff80755d4c
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34907
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Martin Roth <martinroth@google.com>
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Change-Id: I81fcb58720fb20ac4f57e31e9f991f5009aba568
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37020
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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This eases maintenance of our kconfig fork.
Change-Id: Ia4bc0bf22e66457356b9f8fcbea9412792495bca
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37151
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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Change-Id: I35e6a5210340b8057db6d1cff597428fa8dd3cd1
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34527
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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Change-Id: Ib564217c4fdcb609fd6dfd4cb71288dd54ffe4bf
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35774
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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Changes: https://github.com/libexpat/libexpat/blob/R_2_2_9/expat/Changes
Change-Id: I591e4ed186bc8d46ff64161eddc488b640cad5fc
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35432
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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Change-Id: I1265e7df4d6c04aa1ccf0c65dc87e62bec5a4a35
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36066
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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Change-Id: I380ba8678b22483b0d9c5fc558c0e08fd38778e7
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35513
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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Change-Id: I3bb6055383aa72153fffc70adc9cc446e5a0612e
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36013
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Change-Id: I4417c733b3915ad74d81d2e1e0904da06eea300e
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36956
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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The old logic only uses the type to identify resources, which makes a
resource in override tree overriding the first resource with the same
type (but possibly different index) in base tree, and resources with
same type (but again different index) in override tree overriding each
other.
Resources had better be identified with both their type and index.
Change-Id: I7cd88905a8d6d1c7c6c03833835df2fba83047ea
Signed-off-by: Bill XIE <persmule@hardenedlinux.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37109
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Change-Id: I4963ab249a8e0b31c014e92edf1e0a4a4f638084
Signed-off-by: rkanabar <ronak.kanabar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37111
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: V Sowmya <v.sowmya@intel.com>
Reviewed-by: Aamir Bohra <aamir.bohra@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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* Binary strings should be joined with a binary string
* Binary files should be opened in binary mode.
* Division that wants truncation should make it explicit.
I have tested that these changes let me compile.
Change-Id: I7c41b80688a9c6bdb3c66561ff531311cc7ebb13
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37024
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Even with four cloc invocations it's faster than doing the rename
dance and messes up the tree less. It also opens up using cloc's git
mode to work on a git tree instead of a checkout.
Change-Id: I3ad8fc6802ecedb332359d00b28ea61c33ed2ea0
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37023
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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Change-Id: Ie323112d27d228849cca7894b9ebd3f4dedd2d9a
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37022
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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Change-Id: I8e6ff5bc72618e782ed472878bd6ea294be1b5ca
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37021
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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