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* util/sconfig: Issue header for exposed PCI and PNP namesNico Huber2019-10-051-15/+36
| | | | | | | | | | | | | | | | | Let `sconfig` output a C header file with the symbol names that we generate since 5e2a2cd5e7 (util/sconfig: Expose usable PCI and PNP device names). We add another command line argument for the path to the header file. As the file is similar in nature to our `config.h` we simply put it in $(obj)/ too. Change-Id: I8f87288c82f2844b61eba6534797a42b978b47bb Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35488 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* ifdtool: Add validate option to ifdtoolMathew King2019-10-033-14/+78
| | | | | | | | | | | | | | | Add an option to ifdtool which validates that the flash regions defined in the descriptor match the coresponding areas in the FMAP. BUG=chromium:992215 TEST=Ran 'ifdtool -t' with a good bios image and verify no issues run 'ifdtool -t' with a bad bios image and verify expected issues Signed-off-by: Mathew King <mathewk@chromium.org> Change-Id: Idebf105dee1b8f829d54bd65c82867af7aa4aded Reviewed-on: https://review.coreboot.org/c/coreboot/+/34802 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
* util/release: add gerrit stats scriptMartin Roth2019-10-031-0/+470
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This tool downloads, caches and analyzes commits pushed to gerrit for a specified range of commits. Currently it only works over SSH. Data that is printed about the range of commits: CSV Data about each individual commit: - Commit ID - Commit Date - Author - Commiter - Submitter - Lines added - Lines removed - Title - Reviewers It then prints the analysis it did on the data: - Total Commits - Total lines added - Total lines removed - Total difference - Authors - Number of commits - Total Authors - Authors - Lines added - Authors - Lines removed - Reviewers - Number of patches reviewed - Submitters - Number of patches submitted The script relies on a number of perl modules which must be installed separately. Change-Id: I74896a97b5fe370c0b08562ac85d29435e438a31 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/14225 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
* buildgcc: Run aclocal before configureStefan Reinauer2019-10-031-0/+2
| | | | | | | | | | | | Ubuntu 19.04 will fail looking for aclocal-1.15 if the scripts are not regenerated because 19.04 ships with 1.16. There are not enough eyes to roll when working with GNU autotools. Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Signed-off-by: Martin Roth <martin@coreboot.org> Change-Id: I4aa9f520499930ffc984ab0b0144c9c6b2e544a0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/35522 Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* util/crossgcc: Add patch for __alloca missing on ubuntu 18.04Martin Roth2019-10-031-0/+11
| | | | | | | | | | Bring this over from the HEADS repo. Signed-off-by: Martin Roth <martin@coreboot.org> Change-Id: I36dc9860f4c4a2675fd3fa24fa3e534215ceb43e Reviewed-on: https://review.coreboot.org/c/coreboot/+/35724 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
* util/mb/google/hatch: update CRC calculation for correctnessPaul Fagerburg2019-09-301-2/+5
| | | | | | | | | | | | | | | The CRC result is treated as a signed value, and so in certain situations, the calculated value for the last four digits will not be correct. Ensure that the CRC is treated as an unsigned 32-bit value prior to converting the last 4 decimal digits to a string. Signed-off-by: Paul Fagerburg <pfagerburg@chromium.org> Change-Id: I92f9ce1ceb7450f90b89c94e0ace6f79a9419b42 Reviewed-on: https://review.coreboot.org/c/coreboot/+/35604 Reviewed-by: Andrew McRae <amcrae@chromium.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* util/mb/google/hatch: script can take optional bug parameterPaul Fagerburg2019-09-301-4/+8
| | | | | | | | | | | | | When creating a new variant, adding a bug parameter after the name of the variant will populate the BUG= field in the commit message. If the parameter is not present, then BUG=None. Signed-off-by: Paul Fagerburg <pfagerburg@chromium.org> Change-Id: I3e08df5d80a5684c9f3675e3c0a8346240171cd3 Reviewed-on: https://review.coreboot.org/c/coreboot/+/35606 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Andrew McRae <amcrae@chromium.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* util/mb/google/hatch: fix style issues in shell scriptPaul Fagerburg2019-09-301-26/+26
| | | | | | | | | | | | | | | | * Use all caps for variables. * Use a single exit code for failures. * No need to popd before exiting the script. * Do ${var,,} and ${var^^} into variables instead of using it everywhere. * Add more punctuation in comments. * Specify LC_ALL=C so that upper/lower case show the desired behavior. Signed-off-by: Paul Fagerburg <pfagerburg@chromium.org> Change-Id: I63aa0aa633f36b9543e809fc42fac955da5960a3 Reviewed-on: https://review.coreboot.org/c/coreboot/+/35605 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Andrew McRae <amcrae@chromium.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* vboot: create board-specific test-only GBB HWID if not setHung-Te Lin2019-09-302-0/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | The HWID in vboot GBB is an identifier for machine model. On Chrome OS, that should be provisioned in manufacturing process (by collecting real hardware information), and will be checked in system startup. For bring up developers, they usually prefer to generate a test-only string for HWID. However that format was not well documented and cause problems. Further more, most Chromebooks are using HWID v3+ today while the test-only HWID is usually v2. Non-Chrome OS developers may also prefer their own format. To simplify development process, the GBB_CONFIG now defaults to empty string, and will be replaced by a board-specific test-only v2 HWID automatically. Developers can still override that in mainboard Kconfig if they prefer v3 or other arbitrary format. BUG=b:140067412 TEST=Built 'kukui' successfully. Removed kukui GBB config and built again, still seeing correct test HWID. Change-Id: I0cda17a374641589291ec8dfb1d66c553f7cbf35 Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35634 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
* util/chromeos: revise description for more utility scripts in futureHung-Te Lin2019-09-302-15/+16
| | | | | | | | | | | | | | | | | The description.md and README.md was explicitly made for downloading or extracting some resources, but we need to add more Chrome OS related scripts soon; so the description should be revised. Also changed README.md for better markdown style, for example - Use #, ## to replace the old '-' headers - Use code format for file names - Use code block for example of shell execution Change-Id: Icc3677fa318b03f4aee1b0f5fb13b2095f2afe64 Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35664 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
* superiotool: add basic support for SCH5545Alexander Couzens2019-09-281-0/+40
| | | | | | | | | | | Based on the SCH5627 datasheet which is similiar SCH5545 id 0xc4, SCH5627 id 0xc6. Change-Id: I81f3f68690d2000a4fa8a1e703c01f54ebbce953 Signed-off-by: Alexander Couzens <lynxis@fe80.eu> Reviewed-on: https://review.coreboot.org/c/coreboot/+/20237 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* util/mainboard/google: Fix hatch variant scriptEdward O'Callaghan2019-09-251-1/+2
| | | | | | | | | | | | | | | | The script had a couple of bugs: * It didn't create the required directory under variants/ * It was treating the wildcard as literal and so couldn't find variant files to copy. V.2: Drop verbose cp && fixup wild card usage. Change-Id: Ie6f4179014b79ea45d0fcf406ca192046438dbf7 Signed-off-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35553 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Andrew McRae <amcrae@chromium.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
* util/mb/google/hatch: Update kconfig.py to not select SOC_INTEL_COMETLAKEFurquan Shaikh2019-09-251-1/+0
| | | | | | | | | | | | | | | Now that SOC_INTEL_COMETLAKE is selected by default in Kconfig, utility to create a new variant does not need to do that anymore in Kconfig.name Change-Id: If68bcf14e2e0812d4f4dcb99371c65790154ff62 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35563 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Andrew McRae <amcrae@chromium.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* util/lint: make clang-format non-fatalAngel Pons2019-09-192-4/+7
| | | | | | | | | | | | | | | | | | | The current clang-format configuration is completely broken. It forces one to change the code style of patches before pushing them, only to find out that checkpatch now complains about it. This means newcomers get scared away, and developers only get angered and frustrated about it, and end up working around clang-format's requirements anyway. For now, make clang-format's complaints non-fatal, reducing them to text noise. However, since clang-format is currently unusable, reverting it out would be preferred. Change-Id: Iffa8934efa1c27c04e10545f66d8f9976e74c367 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35176 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jacob Garber <jgarber1@ualberta.ca> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
* hatch: automate creating a new variant in corebootPaul Fagerburg2019-09-197-0/+305
| | | | | | | | | | | | | | | | | | | | | | | | | | | | To create a new variant of the hatch baseboard, we need to add the variant's GBB_HWID and other information to Kconfig and Kconfig.name, and set up a skeletal build based on the hatch baseboard. BUG=b:140261109 BRANCH=none TEST=``./create_coreboot_variant.sh sushi && git show`` Kconfig will have three new lines for the SUSHI variant, and Kconfig.name will have an entirely new section. New files created are: variants/sushi/Makefile.inc variants/sushi/overridetree.cb variants/sushi/include/ec.h variants/sushi/include/gpio.h variants/sushi/include/variant/acpi/dptf.asl Also run the script with an existing board name to verify that you can't create a variant that already exists. Change-Id: I1a5b9c8735faafebb2e4e384cb3346867d64c556 Signed-off-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35239 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
* util/inteltool: Add Intel HD 4400 (Haswell IGD)Sellerie2019-09-152-0/+3
| | | | | | | | | | | | | | | | | | Add the 8086:041e integrated graphics controller. Adding the definition makes the Intel HD 4400 graphics recognized by inteltool. It is found on the ark page of e.g. the Intel i3-4130 CPU. Change-Id: I6d6b2eaa7cc5aa3912592ed3fcb73751b224eede Signed-off-by: Christoph Pomaska <sellerie@aufmachen.jetzt> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34588 Reviewed-by: Mimoja <coreboot@mimoja.de> Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-by: Christian Walter <christian.walter@9elements.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* futility: Use HOSTPKGCONFIG for host PKG_CONFIGManoj Gupta2019-09-111-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | futility is built for the host. However, when cross-compiling, the target's pkg-config is called to get the library paths which can add paths from the cross-compilation tree instead of host. e.g. /build/elm/usr/bin/pkg-config gets called instead of /usr/bin/pkg-config . /build/elm/usr/bin/pkg-config adds the paths specific to the cross-compilation target e.g. /build/elm/usr/lib instead of /usr/lib. This causes linker to complain that files in library paths do not match the architecture. BFD produces a warning while LLD errors out. Fix this by passing PKG_CONFIG from host when building futility. BUG=chromium:999217 TEST=coreboot builds BRANCH=None Cq-Depend: chromium:1778519 Change-Id: Id3afbf25001cf3daa72f36a290c93136cf9f162d Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35316 Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* crossgcc: Upgrade CMake to 3.15.3Elyes HAOUAS2019-09-103-2/+2
| | | | | | | | | | Changes: https://cmake.org/cmake/help/v3.15/release/3.15.html Change-Id: Id3283b4a091a5a8afd76235059636bba1c238f0f Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34895 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
* util/sconfig: Expose usable PCI and PNP device namesKyösti Mälkki2019-09-061-0/+16
| | | | | | | | | | | | These devices can be accessed directly by symbolname, without a search and walk through the tree, as they have static paths. Change-Id: I711058f5c809fa9bc7ea4333aaebad6847ebdfd4 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31933 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* inteltool: Add Skylake Xeon E DMI3 Host bridge IdMaxim Polyakov2019-09-054-0/+7
| | | | | | | | | | Tested on Intel S2600WF and SUPERMICRO MBD-X11DPL-I-O Change-Id: I4b429536fc2db16d770120487e4c383da437593a Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35125 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* inteltool: add Lewisburg C62x GPIOs supportMaxim Polyakov2019-09-053-0/+499
| | | | | | | | | | | | | | | These changes are in accordance with the documentation: [*] page 361, Intel(R) C620 Series Chipset Platform Controller Hub (PCH) Datasheet, May 2019. Document Number: 336067-007US Tested on SUPERMICRO MBD-X11DPL-I-O and Intel S2600WF Wolf Pass Change-Id: I43f8f3701de6ab7f89a78c2f5b939b5edd6d5b9d Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34942 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Lance Zhao <lance.zhao@gmail.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* inteltool: add Lewisburg family C62x chipset PCI IDsMaxim Polyakov2019-09-042-0/+27
| | | | | | | | | | | | | These changes are in accordance with the documentation: [*] page 39, Intel(R) C620 Series Chipset Platform Controller Hub (PCH) Datasheet, May 2019. Document Number: 336067-007US Change-Id: I7a1ae0cc4c5d4b02599dfafd30f4a87b3ce74b74 Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34941 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* Kconfig: Write tmp files into same directory as target filesRaul E Rangel2019-08-301-49/+63
| | | | | | | | | | | | | | | | | | | This removes the need for COREBOOT_BUILD_DIR in Kconfig. Since the original files will be replaced with the tmp file, the parent directory already needs to be writable. Before this change, the tmp files would be created in the CWD (src) if COREBOOT_BUILD_DIR was not specified. BUG=b:112267918 TEST=emerge-grunt coreboot and verified no tmp files were created in the src directory. Change-Id: Icdaf2ff3dd1ec98813b75ef55b96e38e1ca19ec7 Signed-off-by: Raul E Rangel <rrangel@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34244 Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* kconfig: Use config's full path when generating tmp fileRaul E Rangel2019-08-301-6/+13
| | | | | | | | | | | | | | | If KCONFIG_CONFIG is set to a full path, we should generate the tmp file in the same directory instead of the current working directory. BUG=b:112267918 TEST=emerge-grunt coreboot and verified with print statements that the correct path was used. Change-Id: Ia21e930a9b0a693f851c34bcde26b34886cbe902 Signed-off-by: Raul E Rangel <rrangel@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34243 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
* Makefile: Pass .xcompile into genbuild_hRaul E Rangel2019-08-281-1/+8
| | | | | | | | | | | | | | | | I'm moving the .xcompile file into the $(obj) directory so we can leave the source pristine. We need to pass the location of .xcompile into genbuild_h.sh. BUG=b:112267918 TEST=Ran genbuild_h with and without an .xcompile and verified it was passed. Change-Id: I8b3a75b478fad92a0b09246f0a00b0580f8c4aef Signed-off-by: Raul E Rangel <rrangel@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34240 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
* what-jenkins-does: Use abuild's -Z optionPatrick Georgi2019-08-281-3/+1
| | | | | | | | | | | | This reduces disk usage during builds by removing all object files and other intermediate files directly after a build instead of waiting for the entire build to pass. Change-Id: Ic2feecd58658e8bac8c6e7a851737784e35b83ef Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35112 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* abuild: Add -Z / --clean-somewhat optionPatrick Georgi2019-08-281-2/+12
| | | | | | | | | | | | This option removes everything in the build tree but coreboot.rom, config.build, config.h and make.log - a useful subset of the tree for further testing. Change-Id: I27e559d8d7dc90d8fe5c4ed8e25249e202e5da36 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35136 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* what-jenkins-does: keep essential artifacts aroundsPatrick Georgi2019-08-261-3/+8
| | | | | | | | | | | | Keep for every board: coreboot.rom, config.h, config.build That way these can be used in follow-up jobs. Change-Id: I5ca5cb84ab1bcffbc92a972980cd0769ebf02462 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35099 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
* mb,autoport: Fix GCC 9 Port_List build errorJacob Garber2019-08-201-2/+1
| | | | | | | | | | | | | | Port_List is an array of 8 elements, and GCC 9 is warning that there are no 'others' when all 8 elements are explicitly initialized, which is causing the build to fail. Remove the 'others => Disabled' clause to silence this. Change-Id: Id082e7a76641438f3fb4c4d976dbd254a7053473 Signed-off-by: Jacob Garber <jgarber1@ualberta.ca> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34918 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* util/nvidia/cbootimage: Update to upstream masterJacob Garber2019-08-201-0/+0
| | | | | | | | | | | | | | | This brings in 4 new commits from the upstream repository. 65a6d94 Free image buffer on read error 9de64c7 Fix various abort(), crashes, and memory errors 7c9db58 Bump to version 1.8 3b3c3cc Use C99 uintXX_t instead of implementation-specific u_intXX_t types Change-Id: If949309a7481537de6529c205fe745d5509906a9 Signed-off-by: Jacob Garber <jgarber1@ualberta.ca> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34409 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
* util/cbfstool: Remove unused assignmentJacob Garber2019-08-201-1/+0
| | | | | | | | | | | | This variable is overwritten on one branch of the next if statement, and the other branch returns, so this assignment does nothing. Change-Id: I63737929d47c882bbcf637182bc8bf73c19daa9f Signed-off-by: Jacob Garber <jgarber1@ualberta.ca> Found-by: scan-build 8.0.0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/34644 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
* util/superiotool: add IT8987 detection and register supportMatt Parnell2019-08-191-0/+141
| | | | | | | | | Signed-off-by: Matt Parnell <mparnell@gmail.com> Change-Id: I3674bc7035a28c4174a1bc1ee014c88e0ac96e8d Reviewed-on: https://review.coreboot.org/c/coreboot/+/34888 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
* util/abuild: Clean up the missing_arches checkRaul E Rangel2019-08-081-2/+18
| | | | | | | | | | | | | | | | | | This change adds the following improvements: * Easier to read. * Checks to see if .xcompile is complete. * Checks the make return code. This will catch if .xcompile is missing. BUG=b:112267918 TEST=Modified my .xcompile and ran abuild and verified that missing_arches got set correctly. Also deleted .xcompile and verified there was a failure. Change-Id: I7604d431f398fc0c80a857a0c7c21e164004cc99 Signed-off-by: Raul E Rangel <rrangel@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34241 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
* util/arm_boot_tools/mksunxiboot: Remove toolArthur Heymans2019-08-052-203/+0
| | | | | | | | | | Support for allwinner sunxi was dropped. Change-Id: I0d4cbcac3e96e381185338455a773bcccc3401ad Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34688 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* util/nvidia: Change ENODATA to ENOATTR for FreeBSDMartin Roth2019-08-031-0/+4
| | | | | | | | | | | | | FreeBSD doesn't have ENODATA defined, so the cbootimage utility wouldn't build. It looks like the BSDs use ENOATTR in the same fashion, so update the error to use that. Change-Id: Ic70710d5726476755585fd1a3ae3f256a430e8df Signed-off-by: Martin Roth <martinr@coreboot.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/28365 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
* util/abuild: Use realpath for FAILED_BOARDS/PASSED_BOARDSRaul E Rangel2019-08-031-2/+7
| | | | | | | | | | | | | | | | | | | | The abuild script will `cd` into the build directory. FAILED_BOARDS defaults to a relative path, so it ends up trying to echo into a directory that doesn't exist. If we set the realpath to the file then we can correctly update the failed/passed boards file. BUG=none TEST=make what-jenkins-does and verified there was a failed_boards and passed_boards in coreboot-builds. Change-Id: Ib3af003b090668380a9425583a9f4367023820a6 Signed-off-by: Raul E Rangel <rrangel@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34526 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
* inteltool: Add GPIO support for Skylake-H chipsetsFelix Singer2019-07-312-2/+16
| | | | | | | | | | | | | | PCH IDs: - H170, Z170, Q170, Q150, C232, QM170, HM170 Used documents: - Intel 332690-005EN Change-Id: I33bf67c0c9d8a5a079fcc78f24a43bc421b2910c Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34618 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* util/release/genrelnotes: Emit more markdown-ish outputPatrick Georgi2019-07-311-2/+2
| | | | | | | | | | | It's better to format lists with bullet points. Change-Id: I503ef2dea9146d67c220236b8a5b64c2ba2d794f Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34504 Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* util/release: Make sure intel-microcode ends up in the blobs tarballPatrick Georgi2019-07-311-2/+2
| | | | | | | | | Change-Id: Ib41c196cf543070e237d240cf31e019c9b2bf339 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34503 Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* util/inteltool: Add H110 GPIO supportPavel Sayekat2019-07-292-0/+2
| | | | | | | | Change-Id: I0ce22da3d201c2443bb5a7fcfd779c2c6ee71577 Signed-off-by: Pavel Sayekat <pavelsayekat@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34602 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* util/amdfwtool: Correct fletcher32 algorithmMarshall Dawson2019-07-291-9/+7
| | | | | | | | | | | | | | | | | | | | | | | Change the fletcher32 checksum calculation to match PSP and AGESA implementations. The symptom of the failure has only been noted in Picasso's BIOS Directory Table, when a BIOS binary image of different sizes were passed to amdfwtool. The PSP halts the boot process with the bad BDT checksum, and if allowed to continue, AGESA asserts later due to a failed BDT verification. This version has been verified to produce the same result as found at https://en.wikipedia.org/wiki/Fletcher%27s_checksum. TEST=Build apu2, bettong, grunt and verify before/after amdfw.rom is unchanged. Change-Id: I2ba2c49a70aa81c15acaab0be6b4c95e7891234f Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34574 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
* util/abuild: Add asserts flag to getoptsMartin Roth2019-07-281-1/+1
| | | | | | | | | | | | We recently added the --asserts option to set asserts as fatal in abuild but didn't add the flag to getopts, so it gets rejected as an invalid argument. Change-Id: Ic70e9a2bec039955cf62c175875598773ade2d3d Signed-off-by: Martin Roth <martinr@coreboot.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34597 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
* util/testing: Allow adding abuild options to what-jenkins-doesPatrick Georgi2019-07-261-0/+1
| | | | | | | | | | | | JENKINS_ABUILD_OPT is passed in abuild's command line Change-Id: I5e7fbb77a3c6592a4414a6c1e3f7556c7e3a824c Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34568 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Jacob Garber <jgarber1@ualberta.ca>
* util/abuild: Add --asserts flagPatrick Georgi2019-07-261-0/+3
| | | | | | | | | | | | | This enables fatal asserts, which can be useful to get better diagnostics by the build tools (both compilers and static analysis.) Change-Id: I1e1653f465fe1f545878d6eec83b8645dc17d9cb Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34567 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Jacob Garber <jgarber1@ualberta.ca>
* util/testing: Factor out abuild options in what-jenkins-doesPatrick Georgi2019-07-261-2/+6
| | | | | | | | | | | | | | The abuild command line can vary a lot depending on options and the line became unwieldy (plus, it's on two lines because we run abuild twice), so factor it out into a variable. Change-Id: I102756fb95c93f542d534610bf9737a13ac1ad62 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34566 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Jacob Garber <jgarber1@ualberta.ca>
* xcompile: Store XGCCPATHNico Huber2019-07-251-0/+1
| | | | | | | | | | | It can be useful to pass along to external projects, e.g. payloads. Change-Id: I61c7bb162e2737a562cbef08b32ebbafd9cf1cb0 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34555 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Martin Roth <martinroth@google.com>
* crossgcc: Add nasm to toolchainMartin Roth2019-07-254-7/+36
| | | | | | | | | | | | | Tianocore payload uses nasm. Supply it in the coreboot toolchain instead of relying on system version. Signed-off-by: Martin Roth <martinroth@chromium.org> Change-Id: I086cbe6c46f7c09b2a7a83e177b32fd1bdf99266 Reviewed-on: https://review.coreboot.org/c/coreboot/+/33024 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* crossgcc: Upgrade CMake to 3.15.0Elyes HAOUAS2019-07-253-3/+3
| | | | | | | | | | Changes: https://cmake.org/cmake/help/v3.15/release/3.15.html Change-Id: Ic9db9050bec45d33d56ee53e3692276494f306de Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33053 Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* crossgcc: Upgrade acpica to version 20190703Elyes HAOUAS2019-07-254-5/+5
| | | | | | | | | | Changes: https://acpica.org/node/171 Change-Id: I3883718623e4a23a901a446f738a9e8c988d8433 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34067 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
* crossgcc: Upgrade Expat to version 2.2.7Elyes HAOUAS2019-07-253-2/+2
| | | | | | | | Change-Id: If3611494228a9228b0b323038ba1e884a1bde10f Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33825 Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-02 16:20:56 +0000