From 09f3b6cf21d735b115d25bf081240979dccd0afc Mon Sep 17 00:00:00 2001 From: Zhuohao Lee Date: Thu, 20 Jan 2022 21:30:12 +0800 Subject: mb, soc: change mainboard_memory_init_params prototype The mainboard_memory_init_params takes the struct FSP_M_CONFIG as the input which make the board has no chance to modify data in the FSPM_UPD, for example, set FspmArchUpd.NvsBufferPtr = 0. After changing the FSP_M_CONFIG to FSPM_UPD, the board can modify the value based on its requirement. BUG=b:200243989 BRANCH=firmware-brya-14505.B TEST=build pass Change-Id: Id552b1f4662f5300f19a3fa2c1f43084ba846706 Signed-off-by: Zhuohao Lee Reviewed-on: https://review.coreboot.org/c/coreboot/+/62293 Tested-by: build bot (Jenkins) Reviewed-by: Tim Wawrzynczak --- src/mainboard/google/brya/romstage.c | 3 ++- src/mainboard/intel/adlrvp/romstage_fsp_params.c | 3 ++- src/mainboard/intel/shadowmountain/romstage.c | 3 ++- src/mainboard/prodrive/atlas/romstage_fsp_params.c | 3 ++- src/soc/intel/alderlake/include/soc/romstage.h | 2 +- src/soc/intel/alderlake/romstage/fsp_params.c | 4 ++-- 6 files changed, 11 insertions(+), 7 deletions(-) diff --git a/src/mainboard/google/brya/romstage.c b/src/mainboard/google/brya/romstage.c index d50d6e857167..ae47167ec1c2 100644 --- a/src/mainboard/google/brya/romstage.c +++ b/src/mainboard/google/brya/romstage.c @@ -7,8 +7,9 @@ #include #include -void mainboard_memory_init_params(FSP_M_CONFIG *m_cfg) +void mainboard_memory_init_params(FSPM_UPD *memupd) { + FSP_M_CONFIG *m_cfg = &memupd->FspmConfig; const struct mb_cfg *mem_config = variant_memory_params(); bool half_populated = variant_is_half_populated(); struct mem_spd spd_info; diff --git a/src/mainboard/intel/adlrvp/romstage_fsp_params.c b/src/mainboard/intel/adlrvp/romstage_fsp_params.c index 56bd0cd1b643..a0453efd5f02 100644 --- a/src/mainboard/intel/adlrvp/romstage_fsp_params.c +++ b/src/mainboard/intel/adlrvp/romstage_fsp_params.c @@ -42,8 +42,9 @@ static void configure_external_clksrc(FSP_M_CONFIG *m_cfg) m_cfg->PcieClkSrcUsage[i] = CONFIG_CLKSRC_FOR_EXTERNAL_BUFFER; } -void mainboard_memory_init_params(FSP_M_CONFIG *m_cfg) +void mainboard_memory_init_params(FSPM_UPD *memupd) { + FSP_M_CONFIG *m_cfg = &memupd->FspmConfig; const struct mb_cfg *mem_config = variant_memory_params(); int board_id = get_board_id(); const bool half_populated = false; diff --git a/src/mainboard/intel/shadowmountain/romstage.c b/src/mainboard/intel/shadowmountain/romstage.c index 8695b6451fa0..48c20db1ab72 100644 --- a/src/mainboard/intel/shadowmountain/romstage.c +++ b/src/mainboard/intel/shadowmountain/romstage.c @@ -7,8 +7,9 @@ #include #include -void mainboard_memory_init_params(FSP_M_CONFIG *m_cfg) +void mainboard_memory_init_params(FSPM_UPD *memupd) { + FSP_M_CONFIG *m_cfg = &memupd->FspmConfig; const struct mb_cfg *mem_config = variant_memory_params(); const bool half_populated = false; diff --git a/src/mainboard/prodrive/atlas/romstage_fsp_params.c b/src/mainboard/prodrive/atlas/romstage_fsp_params.c index 4cd8a127f855..837a52842267 100644 --- a/src/mainboard/prodrive/atlas/romstage_fsp_params.c +++ b/src/mainboard/prodrive/atlas/romstage_fsp_params.c @@ -27,8 +27,9 @@ static const struct mb_cfg ddr5_mem_config = { } }; -void mainboard_memory_init_params(FSP_M_CONFIG *m_cfg) +void mainboard_memory_init_params(FSPM_UPD *memupd) { + FSP_M_CONFIG *m_cfg = &memupd->FspmConfig; const struct mb_cfg *mem_config = &ddr5_mem_config; const bool half_populated = false; diff --git a/src/soc/intel/alderlake/include/soc/romstage.h b/src/soc/intel/alderlake/include/soc/romstage.h index 3b51b69d5232..6504d320859f 100644 --- a/src/soc/intel/alderlake/include/soc/romstage.h +++ b/src/soc/intel/alderlake/include/soc/romstage.h @@ -6,7 +6,7 @@ #include #include -void mainboard_memory_init_params(FSP_M_CONFIG *m_cfg); +void mainboard_memory_init_params(FSPM_UPD *memupd); void systemagent_early_init(void); /* Board type */ diff --git a/src/soc/intel/alderlake/romstage/fsp_params.c b/src/soc/intel/alderlake/romstage/fsp_params.c index 23e82651e3e3..e0f5eb79e7ef 100644 --- a/src/soc/intel/alderlake/romstage/fsp_params.c +++ b/src/soc/intel/alderlake/romstage/fsp_params.c @@ -361,10 +361,10 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version) config = config_of_soc(); soc_memory_init_params(m_cfg, config); - mainboard_memory_init_params(m_cfg); + mainboard_memory_init_params(mupd); } -__weak void mainboard_memory_init_params(FSP_M_CONFIG *m_cfg) +__weak void mainboard_memory_init_params(FSPM_UPD *memupd) { printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__); } -- cgit v1.2.3