From 70b7967bb64a802b984dd6b4c6bc8329da68c0a1 Mon Sep 17 00:00:00 2001 From: Marc Jones Date: Fri, 23 Jan 2009 22:18:24 +0000 Subject: Fix rs690 bug about GPPSB configuration. Signed-off-by: Maggie Li Reviewed-by: Zheng Bao Acked-by: Marc Jones git-svn-id: svn://coreboot.org/repository/coreboot-v3@1123 f3766cd6-281f-0410-b1cd-43a5c92072e9 --- southbridge/amd/rs690/pcie.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/southbridge/amd/rs690/pcie.c b/southbridge/amd/rs690/pcie.c index 799a4ab20e2b..e2f54ecc074b 100644 --- a/southbridge/amd/rs690/pcie.c +++ b/southbridge/amd/rs690/pcie.c @@ -135,8 +135,8 @@ static void switching_gpp_configurations(struct device * nb_dev, struct device * /* sets desired GPPSB configurations, bit4-7 */ reg = nbmisc_read_index(nb_dev, 0x67); - reg &= 0xff0f; /* clean */ - reg |= cfg->gpp_configuration; + reg &= 0xffffff0f; /* clean */ + reg |= cfg->gpp_configuration << 4; nbmisc_write_index(nb_dev, 0x67, reg); /* read bit14 and write back its inverst value */ -- cgit v1.2.3