From a2f47bbd93117063130b3bd595bcfcde66ef53b2 Mon Sep 17 00:00:00 2001 From: Seunghwan Kim Date: Thu, 8 Feb 2024 10:01:35 +0900 Subject: mb/google/brya/var/xol: Update thermal policy Update initial DTT policy and TCC setting for Xol. The setting values are from internal power team. - Critical CPU temparature: 105 -> 99 - TCC offset: 90 -> 94 BUG=b:323989520 BRANCH=firmware-brya-14505.B TEST=FW_NAME=xol emerge-brya coreboot chromeos-bootimage Change-Id: I546b313a1e6af16029309174a5bed2d1e4aa4d11 Signed-off-by: Seunghwan Kim Reviewed-on: https://review.coreboot.org/c/coreboot/+/80410 Reviewed-by: Eric Lai Tested-by: build bot (Jenkins) Reviewed-by: Subrata Banik --- src/mainboard/google/brya/variants/xol/overridetree.cb | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/mainboard/google/brya/variants/xol/overridetree.cb b/src/mainboard/google/brya/variants/xol/overridetree.cb index 205b43f54f9e..8ace1e763712 100644 --- a/src/mainboard/google/brya/variants/xol/overridetree.cb +++ b/src/mainboard/google/brya/variants/xol/overridetree.cb @@ -12,6 +12,8 @@ chip soc/intel/alderlake # display flickering issue. register "disable_dynamic_tccold_handshake" = "true" + register "tcc_offset" = "6" # TCC of 94 + register "platform_pmax" = "145" register "usb2_ports[0]" = "{ @@ -200,7 +202,7 @@ chip soc/intel/alderlake ## Critical Policy register "policies.critical" = "{ - [0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN), + [0] = DPTF_CRITICAL(CPU, 99, SHUTDOWN), [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 85, SHUTDOWN), [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 85, SHUTDOWN), [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 85, SHUTDOWN), -- cgit v1.2.3