From aae448601c0679171d711a70a03bcfe52b4accf3 Mon Sep 17 00:00:00 2001 From: Jonathan Zhang Date: Fri, 19 Jun 2020 12:41:13 -0700 Subject: soc/intel/fsp_broadwell_de: examine ACM status at romstage entry When INTEL_TXT is set, at romstage entry check if startup ACM worked correctly by probing TXT_ERROR register. Signed-off-by: Philipp Deppenwiese Signed-off-by: Jonathan Zhang Change-Id: I6f423df8b05dc44220a9bad3674f687bac94e335 Reviewed-on: https://review.coreboot.org/c/coreboot/+/42713 Reviewed-by: Angel Pons Tested-by: build bot (Jenkins) --- src/soc/intel/fsp_broadwell_de/romstage/romstage.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/src/soc/intel/fsp_broadwell_de/romstage/romstage.c b/src/soc/intel/fsp_broadwell_de/romstage/romstage.c index 8438b1035c93..96999275742c 100644 --- a/src/soc/intel/fsp_broadwell_de/romstage/romstage.c +++ b/src/soc/intel/fsp_broadwell_de/romstage/romstage.c @@ -38,6 +38,9 @@ #include #include +#include +#include + static void init_rtc(void) { u16 gen_pmcon3 = pci_read_config16(PCI_DEV(0, LPC_DEV, LPC_FUNC), GEN_PMCON_3); @@ -156,6 +159,12 @@ void *asmlinkage main(FSP_INFO_HEADER *fsp_info_header) early_iio_hide(); timestamp_add_now(TS_BEFORE_INITRAM); post_code(0x48); + + if (CONFIG(INTEL_TXT)) { + printk(BIOS_DEBUG, "Check TXT_ERROR register\n"); + intel_txt_log_acm_error(read32((void *)TXT_ERROR)); + } + /* * Call early init to initialize memory and chipset. This function returns * to the romstage_main_continue function with a pointer to the HOB -- cgit v1.2.3