From b1c9f7fd122123305f9773f07de408f93779f430 Mon Sep 17 00:00:00 2001 From: Kapil Porwal Date: Wed, 20 Jul 2022 14:10:05 +0000 Subject: mb/google/rex: Set GPIO Tier-1 GPEs in devicetree Set GPE route as GPE0_DW0 -> GPP_A GPE0_DW1 -> GPP_E GPE0_DW2 -> GPP_F BUG=b:224325352 TEST=Verified in emulator that there is no regression Signed-off-by: Kapil Porwal Change-Id: I5e3e09cfc06d2556ea32cca23b3dae114a510498 Reviewed-on: https://review.coreboot.org/c/coreboot/+/66011 Tested-by: build bot (Jenkins) Reviewed-by: Subrata Banik Reviewed-by: Eric Lai --- src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb b/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb index d803670ca1cb..e669c128dd06 100644 --- a/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb +++ b/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb @@ -1,5 +1,10 @@ chip soc/intel/meteorlake + # GPE configuration + register "pmc_gpe0_dw0" = "GPP_A" + register "pmc_gpe0_dw1" = "GPP_E" + register "pmc_gpe0_dw2" = "GPP_F" + # EC host command ranges are in 0x800-0x8ff & 0x200-0x20f register "gen1_dec" = "0x00fc0801" register "gen2_dec" = "0x000c0201" -- cgit v1.2.3