From db8afc70ba3d4399d16e76e9e6cf71fb86f63dd9 Mon Sep 17 00:00:00 2001 From: Alan Huang Date: Mon, 17 Jan 2022 10:37:22 +0800 Subject: mb/google/brya/var/brask: Turn on I2C1 for TPM The latest schematics changes the TPM I2C from I2C3 to I2C1. This patch turns on I2C1 and turns off I2C3. BUG=b:211886429 TEST=Test if proto 1 can boot into Chrome OS successfully. Signed-off-by: Alan Huang Change-Id: I0e94c900b48adf10880aae2abb47e08d1bd9e19b Reviewed-on: https://review.coreboot.org/c/coreboot/+/61135 Tested-by: build bot (Jenkins) Reviewed-by: Zhuohao Lee --- src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb index a7328a9bbeb6..346b98eef2cb 100644 --- a/src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb +++ b/src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb @@ -44,9 +44,9 @@ chip soc/intel/alderlake register "SerialIoI2cMode" = "{ [PchSerialIoIndexI2C0] = PchSerialIoPci, - [PchSerialIoIndexI2C1] = PchSerialIoDisabled, + [PchSerialIoIndexI2C1] = PchSerialIoPci, [PchSerialIoIndexI2C2] = PchSerialIoDisabled, - [PchSerialIoIndexI2C3] = PchSerialIoPci, + [PchSerialIoIndexI2C3] = PchSerialIoDisabled, [PchSerialIoIndexI2C4] = PchSerialIoDisabled, [PchSerialIoIndexI2C5] = PchSerialIoDisabled, }" -- cgit v1.2.3