From e0e6f07220bdf33b224a7f62e1625f41e3d4d89b Mon Sep 17 00:00:00 2001 From: Ronak Kanabar Date: Thu, 17 Feb 2022 21:24:27 +0530 Subject: vendorcode/intel/fsp: Update FSP header file for Alder Lake N FSP v3054.02 The headers added are generated as per FSP v3054.02. Previous FSP version was v2503_00. Changes Include: - UPD Offset Update in FspmUpd.h BUG=b:220076892 BRANCH=None TEST=Build and boot adlnrvp Change-Id: I7b921e2aa467597a1c764fc554e2e83e5bb522e8 Signed-off-by: Ronak Kanabar Reviewed-on: https://review.coreboot.org/c/coreboot/+/62129 Tested-by: build bot (Jenkins) Reviewed-by: Rizwan Qureshi Reviewed-by: Kangheui Won --- src/vendorcode/intel/fsp/fsp2_0/alderlake_n/FspmUpd.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/vendorcode/intel/fsp/fsp2_0/alderlake_n/FspmUpd.h b/src/vendorcode/intel/fsp/fsp2_0/alderlake_n/FspmUpd.h index 5edd3fc8d105..a687eb0ad1c2 100644 --- a/src/vendorcode/intel/fsp/fsp2_0/alderlake_n/FspmUpd.h +++ b/src/vendorcode/intel/fsp/fsp2_0/alderlake_n/FspmUpd.h @@ -3201,7 +3201,7 @@ typedef struct { /** Offset 0x0AA8 - Reserved **/ - UINT8 Reserved45[136]; + UINT8 Reserved45[144]; } FSP_M_CONFIG; /** Fsp M UPD Configuration @@ -3220,11 +3220,11 @@ typedef struct { **/ FSP_M_CONFIG FspmConfig; -/** Offset 0x0B30 +/** Offset 0x0B38 **/ UINT8 UnusedUpdSpace34[6]; -/** Offset 0x0B36 +/** Offset 0x0B3E **/ UINT16 UpdTerminator; } FSPM_UPD; -- cgit v1.2.3