From 0c9eb3153386f9a3e70f3777df7e036a6c6249a3 Mon Sep 17 00:00:00 2001 From: Ravi Kumar Bokka Date: Wed, 31 Mar 2021 08:04:13 +0530 Subject: sc7280: Provide initial SoC support BUG=b:182963902 TEST=Validated on qualcomm sc7280 developement board Change-Id: I1fc841b3113f2bf79b8376cd1ccdb671c53c2084 Signed-off-by: T Michael Turney Reviewed-on: https://review.coreboot.org/c/coreboot/+/45205 Tested-by: build bot (Jenkins) Reviewed-by: Shelley Chen --- Documentation/soc/qualcomm/index.md | 1 + Documentation/soc/qualcomm/sc7280/index.md | 17 +++++++++++++++++ 2 files changed, 18 insertions(+) create mode 100644 Documentation/soc/qualcomm/sc7280/index.md (limited to 'Documentation/soc/qualcomm') diff --git a/Documentation/soc/qualcomm/index.md b/Documentation/soc/qualcomm/index.md index 5cd79819bd15..d177c0eb8d6d 100644 --- a/Documentation/soc/qualcomm/index.md +++ b/Documentation/soc/qualcomm/index.md @@ -5,3 +5,4 @@ This section contains documentation about coreboot on specific Qualcomm SOCs. ## Platforms - [SC7180 series](sc7180/index.md) +- [SC7280 series](sc7280/index.md) diff --git a/Documentation/soc/qualcomm/sc7280/index.md b/Documentation/soc/qualcomm/sc7280/index.md new file mode 100644 index 000000000000..4920805c5248 --- /dev/null +++ b/Documentation/soc/qualcomm/sc7280/index.md @@ -0,0 +1,17 @@ +# Qualcomm SC7280 documentation + +## SOC code + +The SOC folder contains functions for: +* MMU +* CLOCK +* GPIO +* QUPv3 FW (provides a bridge to serial interfaces) +* UART +* SPI-NOR +* AOP FW +* USB + +## Notes about the hardware + +The timer is used from the ARMv8 architecture specific code. -- cgit v1.2.3