From d6eb72c87eb569000df62456c187329ee4967dc1 Mon Sep 17 00:00:00 2001 From: Patrick Georgi Date: Tue, 12 Jan 2021 15:09:57 +0100 Subject: build system: Structure and serialize INTERMEDIATE Target added to INTERMEDIATE all operate on coreboot.pre, each modifying the file in some way. When running them in parallel, coreboot.pre can be read from and written to in parallel which can corrupt the result. Add a function to create those rules that also adds existing INTERMEDIATE targets to enforce an order (as established by evaluation order of Makefile.inc files). While at it, also add the addition to the PHONY target so we don't forget it. BUG=chromium:1154313, b:174585424 TEST=Built a configuration with SeaBIOS + SeaBIOS config files (ps2 timeout and sercon) and saw that they were executed. Change-Id: Ia5803806e6c33083dfe5dec8904a65c46436e756 Signed-off-by: Patrick Georgi Reviewed-on: https://review.coreboot.org/c/coreboot/+/49358 Reviewed-by: Martin Roth Tested-by: build bot (Jenkins) --- Makefile.inc | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) (limited to 'Makefile.inc') diff --git a/Makefile.inc b/Makefile.inc index 72f5d24da0ec..a67b22c84d2c 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -1144,6 +1144,10 @@ else RAMSTAGE= endif +add_intermediate = \ + $(1): $(2) | $(INTERMEDIATE) \ + $(eval INTERMEDIATE+=$(1)) $(eval PHONY+=$(1)) + $(obj)/coreboot.rom: $(obj)/coreboot.pre $(RAMSTAGE) $(CBFSTOOL) $$(INTERMEDIATE) @printf " CBFS $(subst $(obj)/,,$(@))\n" # The full ROM may be larger than the CBFS part, so create an empty @@ -1247,7 +1251,7 @@ cbfs-get-segments-cmd = $(CBFSTOOL) $(obj)/coreboot.pre print -v | sed -n \ ramstage-symbol-addr-cmd = $(OBJDUMP_ramstage) -t $(objcbfs)/ramstage.elf | \ sed -n '/ $(1)$$/s/^\([0-9a-fA-F]*\) .*/0x\1/p' -check-ramstage-overlaps: $(obj)/coreboot.pre +$(call add_intermediate, check-ramstage-overlaps, $(obj)/coreboot.pre) programs=$$($(foreach file,$(check-ramstage-overlap-files), \ $(call cbfs-get-segments-cmd,$(file)) ; )) ; \ regions=$$($(foreach region,$(check-ramstage-overlap-regions), \ @@ -1273,6 +1277,4 @@ check-ramstage-overlaps: $(obj)/coreboot.pre pstart= ; pend= ; \ done -INTERMEDIATE+=check-ramstage-overlaps -PHONY+=check-ramstage-overlaps endif -- cgit v1.2.3