From c22ad581c80d276bc5509b7a8be79784b14a60af Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jonathan=20Neusch=C3=A4fer?= Date: Fri, 30 Nov 2018 00:06:50 +0100 Subject: arch/power8: Rename to ppc64 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit POWER8 is a specific implementation of ppc64, which is by now outdated (POWER9 has been on the market for a while). Rename arch/power8/ to potentially cover a wider range of hardware. TEST=Toolchains built before/after this commit can build coreboot for emulation/qemu-power8 from before/after this commit. Change-Id: I2d6f08b12a9ffc8a652ddcd6f24ad85ecb33ca52 Signed-off-by: Jonathan Neuschäfer Reviewed-on: https://review.coreboot.org/c/29943 Tested-by: build bot (Jenkins) Reviewed-by: Timothy Pearson --- src/arch/ppc64/Kconfig | 25 ++++++ src/arch/ppc64/Makefile.inc | 108 ++++++++++++++++++++++++++ src/arch/ppc64/boot.c | 23 ++++++ src/arch/ppc64/bootblock.S | 46 +++++++++++ src/arch/ppc64/id.ld | 19 +++++ src/arch/ppc64/include/arch/byteorder.h | 19 +++++ src/arch/ppc64/include/arch/cache.h | 39 ++++++++++ src/arch/ppc64/include/arch/cbconfig.h | 28 +++++++ src/arch/ppc64/include/arch/cpu.h | 48 ++++++++++++ src/arch/ppc64/include/arch/early_variables.h | 28 +++++++ src/arch/ppc64/include/arch/exception.h | 21 +++++ src/arch/ppc64/include/arch/header.ld | 28 +++++++ src/arch/ppc64/include/arch/hlt.h | 18 +++++ src/arch/ppc64/include/arch/io.h | 48 ++++++++++++ src/arch/ppc64/include/arch/memlayout.h | 26 +++++++ src/arch/ppc64/include/arch/stages.h | 23 ++++++ src/arch/ppc64/include/stdint.h | 76 ++++++++++++++++++ src/arch/ppc64/misc.c | 22 ++++++ src/arch/ppc64/prologue.inc | 17 ++++ src/arch/ppc64/rom_media.c | 26 +++++++ src/arch/ppc64/stages.c | 32 ++++++++ src/arch/ppc64/tables.c | 32 ++++++++ 22 files changed, 752 insertions(+) create mode 100644 src/arch/ppc64/Kconfig create mode 100644 src/arch/ppc64/Makefile.inc create mode 100644 src/arch/ppc64/boot.c create mode 100644 src/arch/ppc64/bootblock.S create mode 100644 src/arch/ppc64/id.ld create mode 100644 src/arch/ppc64/include/arch/byteorder.h create mode 100644 src/arch/ppc64/include/arch/cache.h create mode 100644 src/arch/ppc64/include/arch/cbconfig.h create mode 100644 src/arch/ppc64/include/arch/cpu.h create mode 100644 src/arch/ppc64/include/arch/early_variables.h create mode 100644 src/arch/ppc64/include/arch/exception.h create mode 100644 src/arch/ppc64/include/arch/header.ld create mode 100644 src/arch/ppc64/include/arch/hlt.h create mode 100644 src/arch/ppc64/include/arch/io.h create mode 100644 src/arch/ppc64/include/arch/memlayout.h create mode 100644 src/arch/ppc64/include/arch/stages.h create mode 100644 src/arch/ppc64/include/stdint.h create mode 100644 src/arch/ppc64/misc.c create mode 100644 src/arch/ppc64/prologue.inc create mode 100644 src/arch/ppc64/rom_media.c create mode 100644 src/arch/ppc64/stages.c create mode 100644 src/arch/ppc64/tables.c (limited to 'src/arch/ppc64') diff --git a/src/arch/ppc64/Kconfig b/src/arch/ppc64/Kconfig new file mode 100644 index 000000000000..9e37bfc15f31 --- /dev/null +++ b/src/arch/ppc64/Kconfig @@ -0,0 +1,25 @@ +config ARCH_PPC64 + bool + default n + +config ARCH_BOOTBLOCK_PPC64 + bool + default n + select ARCH_PPC64 + select BOOTBLOCK_CUSTOM + select C_ENVIRONMENT_BOOTBLOCK + select ARCH_VERSTAGE_PPC64 + select ARCH_ROMSTAGE_PPC64 + select ARCH_RAMSTAGE_PPC64 + +config ARCH_VERSTAGE_PPC64 + bool + default n + +config ARCH_ROMSTAGE_PPC64 + bool + default n + +config ARCH_RAMSTAGE_PPC64 + bool + default n diff --git a/src/arch/ppc64/Makefile.inc b/src/arch/ppc64/Makefile.inc new file mode 100644 index 000000000000..99d86345ac7e --- /dev/null +++ b/src/arch/ppc64/Makefile.inc @@ -0,0 +1,108 @@ +################################################################################ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2016 Raptor Engineering, LLC +## Copyright (C) 2014 The ChromiumOS Authors +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; version 2 of the License. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +################################################################################ + +ppc64_flags = -I$(src)/arch/ppc64/ -mbig-endian -mcpu=power8 -mtune=power8 + +ppc64_asm_flags = + +################################################################################ +## bootblock +################################################################################ +ifeq ($(CONFIG_ARCH_BOOTBLOCK_PPC64),y) + +bootblock-y = bootblock.S stages.c +bootblock-y += boot.c +bootblock-y += rom_media.c +bootblock-y += \ + $(top)/src/lib/memchr.c \ + $(top)/src/lib/memcmp.c \ + $(top)/src/lib/memcpy.c \ + $(top)/src/lib/memmove.c \ + $(top)/src/lib/memset.c + +bootblock-generic-ccopts += $(ppc64_flags) + +$(objcbfs)/bootblock.debug: $$(bootblock-objs) + @printf " LINK $(subst $(obj)/,,$(@))\n" + $(LD_bootblock) $(LDFLAGS_bootblock) -o $@ -L$(obj) \ + -T $(call src-to-obj,bootblock,src/mainboard/$(MAINBOARDDIR)/memlayout.ld) --whole-archive --start-group $(filter-out %.ld,$(bootblock-objs)) \ + $(LIBGCC_FILE_NAME_bootblock) --end-group $(COMPILER_RT_bootblock) + +endif + +################################################################################ +## romstage +################################################################################ +ifeq ($(CONFIG_ARCH_ROMSTAGE_PPC64),y) + +romstage-y += boot.c +romstage-y += stages.c +romstage-y += rom_media.c +romstage-y += \ + $(top)/src/lib/memchr.c \ + $(top)/src/lib/memcmp.c \ + $(top)/src/lib/memcpy.c \ + $(top)/src/lib/memmove.c \ + $(top)/src/lib/memset.c + +romstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c + +# Build the romstage + +$(objcbfs)/romstage.debug: $$(romstage-objs) + @printf " LINK $(subst $(obj)/,,$(@))\n" + $(LD_romstage) $(LDFLAGS_romstage) -o $@ -L$(obj) -T $(call src-to-obj,romstage,src/mainboard/$(MAINBOARDDIR)/memlayout.ld) --whole-archive --start-group $(filter-out %.ld,$(romstage-objs)) --end-group $(COMPILER_RT_romstage) + +romstage-c-ccopts += $(ppc64_flags) +romstage-S-ccopts += $(ppc64_asm_flags) + +endif + +################################################################################ +## ramstage +################################################################################ +ifeq ($(CONFIG_ARCH_RAMSTAGE_PPC64),y) + +ramstage-y += rom_media.c +ramstage-y += stages.c +ramstage-y += misc.c +ramstage-y += boot.c +ramstage-y += tables.c +ramstage-y += \ + $(top)/src/lib/memchr.c \ + $(top)/src/lib/memcmp.c \ + $(top)/src/lib/memcpy.c \ + $(top)/src/lib/memmove.c \ + $(top)/src/lib/memset.c + +$(eval $(call create_class_compiler,rmodules,power8)) + +ramstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c + +ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/mainboard.c + +# Build the ramstage + +$(objcbfs)/ramstage.debug: $$(ramstage-objs) + @printf " CC $(subst $(obj)/,,$(@))\n" + $(LD_ramstage) $(LDFLAGS_ramstage) -o $@ -L$(obj) -T $(call src-to-obj,ramstage,src/mainboard/$(MAINBOARDDIR)/memlayout.ld) --whole-archive --start-group $(filter-out %.ld,$(ramstage-objs)) --end-group $(COMPILER_RT_ramstage) + +ramstage-c-ccopts += $(ppc64_flags) +ramstage-S-ccopts += $(ppc64_asm_flags) + +endif diff --git a/src/arch/ppc64/boot.c b/src/arch/ppc64/boot.c new file mode 100644 index 000000000000..4da60b4e6cab --- /dev/null +++ b/src/arch/ppc64/boot.c @@ -0,0 +1,23 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2013 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include + +void arch_prog_run(struct prog *prog) +{ + void (*doit)(void *) = prog_entry(prog); + + doit(prog_entry_arg(prog)); +} diff --git a/src/arch/ppc64/bootblock.S b/src/arch/ppc64/bootblock.S new file mode 100644 index 000000000000..77289a12464b --- /dev/null +++ b/src/arch/ppc64/bootblock.S @@ -0,0 +1,46 @@ +/* + * Early initialization code for POWER8. + * + * Copyright 2016 Raptor Engineering, LLC + * Copyright 2013 Google Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the + * GNU General Public License for more details. + */ + +.section ".text._start", "ax", %progbits +.globl _start +.org 0x100, 0xff +_start: + b _start + .section ".id", "a", %progbits + + .section ".id", "a", @progbits + + .globl __id_start +__id_start: +ver: + .asciz "4" //COREBOOT_VERSION +vendor: + .asciz "qemu" //CONFIG_MAINBOARD_VENDOR +part: + .asciz "1" //CONFIG_MAINBOARD_PART_NUMBER + /* Reverse offset to the vendor id */ +.long __id_end + CONFIG_ID_SECTION_OFFSET - ver + /* Reverse offset to the vendor id */ +.long __id_end + CONFIG_ID_SECTION_OFFSET - vendor + /* Reverse offset to the part number */ +.long __id_end + CONFIG_ID_SECTION_OFFSET - part + /* of this romimage */ +.long CONFIG_ROM_SIZE + .globl __id_end + +__id_end: +.previous diff --git a/src/arch/ppc64/id.ld b/src/arch/ppc64/id.ld new file mode 100644 index 000000000000..932375665ec6 --- /dev/null +++ b/src/arch/ppc64/id.ld @@ -0,0 +1,19 @@ +/* + * This file is part of the coreboot project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +SECTIONS { + . = (0xffffffff - CONFIG_ID_SECTION_OFFSET) - (__id_end - __id_start) + 1; + .id (.): { + *(.id) + } +} diff --git a/src/arch/ppc64/include/arch/byteorder.h b/src/arch/ppc64/include/arch/byteorder.h new file mode 100644 index 000000000000..37cb8b6df6f3 --- /dev/null +++ b/src/arch/ppc64/include/arch/byteorder.h @@ -0,0 +1,19 @@ +/* + * This file is part of the coreboot project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _BYTEORDER_H +#define _BYTEORDER_H + +#define __LITTLE_ENDIAN 1234 + +#endif /* _BYTEORDER_H */ diff --git a/src/arch/ppc64/include/arch/cache.h b/src/arch/ppc64/include/arch/cache.h new file mode 100644 index 000000000000..37174475f58d --- /dev/null +++ b/src/arch/ppc64/include/arch/cache.h @@ -0,0 +1,39 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2017 Google Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + */ + +#ifndef ARCH_CACHE_H +#define ARCH_CACHE_H + +/* TODO: implement these API stubs once caching is available on Power 8 */ +static inline void dcache_clean_all(void) {} +static inline void dcache_invalidate_all(void) {} +static inline void dcache_clean_invalidate_all(void) {} + +#endif /* ARCH_CACHE_H */ diff --git a/src/arch/ppc64/include/arch/cbconfig.h b/src/arch/ppc64/include/arch/cbconfig.h new file mode 100644 index 000000000000..9467f52646d0 --- /dev/null +++ b/src/arch/ppc64/include/arch/cbconfig.h @@ -0,0 +1,28 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2016 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _ARCH_CBCONFIG_H_ +#define _ARCH_CBCONFIG_H_ + +/* + * Instead of using Kconfig variables for internal coreboot infrastructure + * variables that are architecture dependent land those things in this file. + * If it's not obvious all variables that are used in the common code need + * to have the same name across all architectures. + */ + +#define COREBOOT_TABLE_SIZE 0x2000 + +#endif diff --git a/src/arch/ppc64/include/arch/cpu.h b/src/arch/ppc64/include/arch/cpu.h new file mode 100644 index 000000000000..3238bfbf321d --- /dev/null +++ b/src/arch/ppc64/include/arch/cpu.h @@ -0,0 +1,48 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2012 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __ARCH_CPU_H__ +#define __ARCH_CPU_H__ + +#define asmlinkage + +#if !defined(__PRE_RAM__) +#include + +struct cpu_driver { + struct device_operations *ops; + const struct cpu_device_id *id_table; +}; + +struct thread; + +struct cpu_info { + struct device *cpu; + unsigned long index; +#if IS_ENABLED(CONFIG_COOP_MULTITASKING) + struct thread *thread; +#endif +}; + +struct cpuinfo_ppc64 { + uint8_t ppc64; /* CPU family */ + uint8_t ppc64_vendor; /* CPU vendor */ + uint8_t ppc64_model; +}; + +#endif + +struct cpu_info *cpu_info(void); +#endif /* __ARCH_CPU_H__ */ diff --git a/src/arch/ppc64/include/arch/early_variables.h b/src/arch/ppc64/include/arch/early_variables.h new file mode 100644 index 000000000000..99fc06bb183c --- /dev/null +++ b/src/arch/ppc64/include/arch/early_variables.h @@ -0,0 +1,28 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2011 The ChromiumOS Authors. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef ARCH_EARLY_VARIABLES_H +#define ARCH_EARLY_VARIABLES_H + +#define CAR_GLOBAL + +#define CAR_MIGRATE(migrate_fn_) +static inline void *car_get_var_ptr(void *var) { return var; } +#define car_get_var(var) (var) +#define car_sync_var(var) (var) + +#define car_set_var(var, val) do { (var) = (val); } while (0) + +#endif diff --git a/src/arch/ppc64/include/arch/exception.h b/src/arch/ppc64/include/arch/exception.h new file mode 100644 index 000000000000..07030e5b9557 --- /dev/null +++ b/src/arch/ppc64/include/arch/exception.h @@ -0,0 +1,21 @@ +/* + * This file is part of the coreboot project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _ARCH_EXCEPTION_H +#define _ARCH_EXCEPTION_H + +static inline void exception_init(void) +{ +} + +#endif diff --git a/src/arch/ppc64/include/arch/header.ld b/src/arch/ppc64/include/arch/header.ld new file mode 100644 index 000000000000..7fdc155586e6 --- /dev/null +++ b/src/arch/ppc64/include/arch/header.ld @@ -0,0 +1,28 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2014 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* We use ELF as output format. So that we can debug the code in some form. */ +OUTPUT_ARCH(powerpc) + +PHDRS +{ + to_load PT_LOAD; +} + +#ifdef __BOOTBLOCK__ +ENTRY(_start) +#else +ENTRY(stage_entry) +#endif diff --git a/src/arch/ppc64/include/arch/hlt.h b/src/arch/ppc64/include/arch/hlt.h new file mode 100644 index 000000000000..1ba1e35b6754 --- /dev/null +++ b/src/arch/ppc64/include/arch/hlt.h @@ -0,0 +1,18 @@ +/* + * This file is part of the coreboot project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +static __always_inline void hlt(void) +{ + while (1) + ; +} diff --git a/src/arch/ppc64/include/arch/io.h b/src/arch/ppc64/include/arch/io.h new file mode 100644 index 000000000000..804d7dc1b1af --- /dev/null +++ b/src/arch/ppc64/include/arch/io.h @@ -0,0 +1,48 @@ +/* + * This file is part of the coreboot project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _ASM_IO_H +#define _ASM_IO_H + +#include + +static inline void outb(uint8_t value, uint16_t port) +{ +} + +static inline void outw(uint16_t value, uint16_t port) +{ +} + +static inline void outl(uint32_t value, uint16_t port) +{ +} + + +static inline uint8_t inb(uint16_t port) +{ + return 0; +} + + +static inline uint16_t inw(uint16_t port) +{ + return 0; +} + +static inline uint32_t inl(uint16_t port) +{ + return 0; +} + +#endif diff --git a/src/arch/ppc64/include/arch/memlayout.h b/src/arch/ppc64/include/arch/memlayout.h new file mode 100644 index 000000000000..4d2af5953d87 --- /dev/null +++ b/src/arch/ppc64/include/arch/memlayout.h @@ -0,0 +1,26 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2014 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* This file contains macro definitions for memlayout.ld linker scripts. */ + +#ifndef __ARCH_MEMLAYOUT_H +#define __ARCH_MEMLAYOUT_H + +/* TODO: Double-check that that's the correct alignment for our ABI. */ +#define STACK(addr, size) REGION(stack, addr, size, 8) + +/* TODO: Need to add DMA_COHERENT region like on ARM? */ + +#endif /* __ARCH_MEMLAYOUT_H */ diff --git a/src/arch/ppc64/include/arch/stages.h b/src/arch/ppc64/include/arch/stages.h new file mode 100644 index 000000000000..90bd60b9a685 --- /dev/null +++ b/src/arch/ppc64/include/arch/stages.h @@ -0,0 +1,23 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2013 The ChromiumOS Authors + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __ARCH_STAGES_H +#define __ARCH_STAGES_H + +#include + +void stage_entry(void) __attribute__((section(".text.stage_entry"))); + +#endif diff --git a/src/arch/ppc64/include/stdint.h b/src/arch/ppc64/include/stdint.h new file mode 100644 index 000000000000..642582443957 --- /dev/null +++ b/src/arch/ppc64/include/stdint.h @@ -0,0 +1,76 @@ +/* + * This file is part of the coreboot project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef PPC64_STDINT_H +#define PPC64_STDINT_H + +/* Exact integral types */ +typedef unsigned char uint8_t; +typedef signed char int8_t; + +typedef unsigned short uint16_t; +typedef signed short int16_t; + +typedef unsigned int uint32_t; +typedef signed int int32_t; + +typedef unsigned long long uint64_t; +typedef signed long long int64_t; + +/* Small types */ +typedef unsigned char uint_least8_t; +typedef signed char int_least8_t; + +typedef unsigned short uint_least16_t; +typedef signed short int_least16_t; + +typedef unsigned int uint_least32_t; +typedef signed int int_least32_t; + +typedef unsigned long long uint_least64_t; +typedef signed long long int_least64_t; + +/* Fast Types */ +typedef unsigned char uint_fast8_t; +typedef signed char int_fast8_t; + +typedef unsigned int uint_fast16_t; +typedef signed int int_fast16_t; + +typedef unsigned int uint_fast32_t; +typedef signed int int_fast32_t; + +typedef unsigned long long uint_fast64_t; +typedef signed long long int_fast64_t; + +typedef long long int intmax_t; +typedef unsigned long long uintmax_t; + +typedef uint8_t u8; +typedef uint16_t u16; +typedef uint32_t u32; +typedef uint64_t u64; +typedef int8_t s8; +typedef int16_t s16; +typedef int32_t s32; +typedef int64_t s64; + +typedef uint8_t bool; +#define true 1 +#define false 0 + +/* Types for `void *' pointers. */ +typedef s64 intptr_t; +typedef u64 uintptr_t; + +#endif /* PPC64_STDINT_H */ diff --git a/src/arch/ppc64/misc.c b/src/arch/ppc64/misc.c new file mode 100644 index 000000000000..65b8ecf02fbc --- /dev/null +++ b/src/arch/ppc64/misc.c @@ -0,0 +1,22 @@ +/* + * This file is part of the coreboot project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include + +void init_timer(void) +{ +} + +void udelay(unsigned int n) +{ +} diff --git a/src/arch/ppc64/prologue.inc b/src/arch/ppc64/prologue.inc new file mode 100644 index 000000000000..a349cf97b375 --- /dev/null +++ b/src/arch/ppc64/prologue.inc @@ -0,0 +1,17 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2002 Eric Biederman + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +.section ".rom.data", "a", @progbits +.section ".rom.text", "ax", @progbits diff --git a/src/arch/ppc64/rom_media.c b/src/arch/ppc64/rom_media.c new file mode 100644 index 000000000000..c1713074f977 --- /dev/null +++ b/src/arch/ppc64/rom_media.c @@ -0,0 +1,26 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2015 Google Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +#include + +/* This assumes that the CBFS resides at 0x0, which is true for the default + * configuration. */ +static const struct mem_region_device boot_dev = + MEM_REGION_DEV_RO_INIT(NULL, CONFIG_ROM_SIZE); + +const struct region_device *boot_device_ro(void) +{ + return &boot_dev.rdev; +} diff --git a/src/arch/ppc64/stages.c b/src/arch/ppc64/stages.c new file mode 100644 index 000000000000..053fd7634c57 --- /dev/null +++ b/src/arch/ppc64/stages.c @@ -0,0 +1,32 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2014 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* + * This file contains entry/exit functions for each stage during coreboot + * execution (bootblock entry and ramstage exit will depend on external + * loading). + * + * Entry points must be placed at the location the previous stage jumps + * to (the lowest address in the stage image). This is done by giving + * stage_entry() its own section in .text and placing it first in the + * linker script. + */ + +#include + +void stage_entry(void) +{ + main(); +} diff --git a/src/arch/ppc64/tables.c b/src/arch/ppc64/tables.c new file mode 100644 index 000000000000..eef6bf2ffdf7 --- /dev/null +++ b/src/arch/ppc64/tables.c @@ -0,0 +1,32 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2003 Eric Biederman + * Copyright (C) 2005 Steve Magnani + * Copyright (C) 2008-2009 coresystems GmbH + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include + +void arch_write_tables(uintptr_t coreboot_table) +{ +} + +void bootmem_arch_add_ranges(void) +{ +} + +void lb_arch_add_records(struct lb_header *header) +{ +} -- cgit v1.2.3