From 9c20ad6da2cb5322afc389373bc27185c38fed98 Mon Sep 17 00:00:00 2001 From: Iru Cai Date: Thu, 30 Jul 2020 22:57:09 +0800 Subject: cpu/intel/common/fsb.c: add Crystal Well support Without this change, there will be no console output when using a Crystal Well CPU. Tested with i5-4570R (with LGA1150 mod) on ASRock H81M-HDS. Change-Id: Id18645c52d9c4a4ea7acb602bcb39b796d9e24b9 Signed-off-by: Iru Cai Reviewed-on: https://review.coreboot.org/c/coreboot/+/44065 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons --- src/cpu/intel/common/fsb.c | 1 + 1 file changed, 1 insertion(+) (limited to 'src/cpu/intel/common/fsb.c') diff --git a/src/cpu/intel/common/fsb.c b/src/cpu/intel/common/fsb.c index 7772171f0dc3..3d46bbc4b94a 100644 --- a/src/cpu/intel/common/fsb.c +++ b/src/cpu/intel/common/fsb.c @@ -45,6 +45,7 @@ static int get_fsb_tsc(int *fsb, int *ratio) case 0x3a: /* IvyBridge BCLK fixed at 100MHz */ case 0x3c: /* Haswell BCLK fixed at 100MHz */ case 0x45: /* Haswell-ULT BCLK fixed at 100MHz */ + case 0x46: /* Haswell-GT3e BCLK fixed at 100MHz */ *fsb = 100; *ratio = (rdmsr(MSR_PLATFORM_INFO).lo >> 8) & 0xff; break; -- cgit v1.2.3