From 6151ff3eae6503e1b14fd0898b689f295ddd48f8 Mon Sep 17 00:00:00 2001 From: Felix Held Date: Thu, 3 Feb 2022 15:31:55 +0100 Subject: drivers/i2c/designware/dw_i2c: improve CONTROL_SPEED_FS definition The speed control bits of the Designware I2C controller are bits 1 and 2 in the control register, so the values should be written as number shifted by the number of the first bit. The resulting constant is identical. TEST=Timeless build for amd/chausie results in identical binary Signed-off-by: Felix Held Change-Id: Id0881dfcd7703ab6a70a9b1a355d5a93771aebc6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61591 Tested-by: build bot (Jenkins) Reviewed-by: Raul Rangel --- src/drivers/i2c/designware/dw_i2c.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/drivers/i2c') diff --git a/src/drivers/i2c/designware/dw_i2c.c b/src/drivers/i2c/designware/dw_i2c.c index 2a7c6fcc334f..2cc236e81b02 100644 --- a/src/drivers/i2c/designware/dw_i2c.c +++ b/src/drivers/i2c/designware/dw_i2c.c @@ -43,7 +43,7 @@ struct freq { enum { CONTROL_MASTER_MODE = (1 << 0), CONTROL_SPEED_SS = (1 << 1), - CONTROL_SPEED_FS = (1 << 2), + CONTROL_SPEED_FS = (2 << 1), CONTROL_SPEED_HS = (3 << 1), CONTROL_SPEED_MASK = (3 << 1), CONTROL_10BIT_SLAVE = (1 << 3), -- cgit v1.2.3