From 1110495de926db4b21b9969da522e5270c67f115 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Sun, 29 Jun 2014 16:17:33 +0300 Subject: SPI: Split writes using spi_crop_chunk() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit SPI controllers in Intel and AMD bridges have a slightly different restriction on how long transactions they can handle. Change-Id: I3d149d4b7e7e9633482a153d5e380a86c553d871 Signed-off-by: Kyösti Mälkki Reviewed-on: http://review.coreboot.org/6163 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan --- src/include/spi-generic.h | 2 ++ src/include/spi_flash.h | 8 -------- 2 files changed, 2 insertions(+), 8 deletions(-) (limited to 'src/include') diff --git a/src/include/spi-generic.h b/src/include/spi-generic.h index 6c62de6d1dd3..3b10ae9f49ae 100644 --- a/src/include/spi-generic.h +++ b/src/include/spi-generic.h @@ -168,6 +168,8 @@ void spi_cs_deactivate(struct spi_slave *slave); */ void spi_set_speed(struct spi_slave *slave, uint32_t hz); +unsigned int spi_crop_chunk(unsigned int cmd_len, unsigned int buf_len); + /*----------------------------------------------------------------------- * Write 8 bits, then read 8 bits. * slave: The SPI slave we're communicating with diff --git a/src/include/spi_flash.h b/src/include/spi_flash.h index 61c931e32c53..70ca784c9003 100644 --- a/src/include/spi_flash.h +++ b/src/include/spi_flash.h @@ -39,14 +39,6 @@ const typeof( ((type *)0)->member ) *__mptr = (ptr); \ (type *)( (char *)__mptr - offsetof(type,member) );}) -#define CONFIG_ICH_SPI -#ifdef CONFIG_ICH_SPI -#define CONTROLLER_PAGE_LIMIT 64 -#else -/* any number larger than 4K would do, actually */ -#define CONTROLLER_PAGE_LIMIT ((int)(~0U>>1)) -#endif - struct spi_flash { struct spi_slave *spi; -- cgit v1.2.3