From e5cf666b9a5fa60d1253a94fc1e62c8ba86f28ce Mon Sep 17 00:00:00 2001 From: Hung-Te Lin Date: Fri, 3 Sep 2021 15:44:04 +0800 Subject: mb/google/asurada: fine tune the data lane trail for ANX7625 The ANX7625 display bridge requires customized hs_da_trail time. This patch is based on CB:51433 (commit 6482b16, "mb/google/kukui: fine tune the data lane trail") BUG=b:198558237 TEST=emerge-asurada coreboot BRANCH=asurada Signed-off-by: Hung-Te Lin Change-Id: I0eedb8fa6a1b3dfd9619c7cbf755c9c4071a8484 Reviewed-on: https://review.coreboot.org/c/coreboot/+/57481 Tested-by: build bot (Jenkins) Reviewed-by: Rex-BC Chen Reviewed-by: Yu-Ping Wu --- src/mainboard/google/asurada/mainboard.c | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'src/mainboard/google/asurada') diff --git a/src/mainboard/google/asurada/mainboard.c b/src/mainboard/google/asurada/mainboard.c index c8faffcfcd69..7704899f1678 100644 --- a/src/mainboard/google/asurada/mainboard.c +++ b/src/mainboard/google/asurada/mainboard.c @@ -64,6 +64,12 @@ static void register_reset_to_bl31(void) register_bl31_aux_param(¶m_reset.h); } +/* Override hs_da_trail for ANX7625 */ +void mtk_dsi_override_phy_timing(struct mtk_phy_timing *timing) +{ + timing->da_hs_trail += 9; +} + /* Set up backlight control pins as output pin and power-off by default */ static void configure_backlight_and_bridge(void) { -- cgit v1.2.3