From 81d3856755c88297a5c1ad94f452db3996287eec Mon Sep 17 00:00:00 2001 From: Ivy Jian Date: Mon, 6 Jun 2022 17:11:54 +0800 Subject: mb/google/brya/var/agah: Use USB2_PORT_MAX_TYPE_C for Type-C USB2 port Override the type-C USB2 port setting from `USB2_PORT_TYPE_C` to `USB2_PORT_MAX_TYPE_C`. The change is required to detect USB2 device on type-C port of Agah boards. BUG=b:233554817 TEST=build and test USB2 hub could be detected on both the Type-C ports. ================================================================= usb 3-3: New USB device found,idVendor=1a40,idProduct=0801,bcdDevice= 1.00 usb 3-3: New USB device strings: Mfr=0, Product=1, SerialNumber=0 usb 3-3: Product: USB 2.0 Hub hub 3-3:1.0: USB hub found hub 3-3:1.0: 4 ports detected ================================================================= Change-Id: I856402aa128db0c4ba092e1c2a66e29bc9165c40 Signed-off-by: Ivy Jian Reviewed-on: https://review.coreboot.org/c/coreboot/+/64988 Reviewed-by: Tim Wawrzynczak Reviewed-by: Eric Lai Tested-by: build bot (Jenkins) --- src/mainboard/google/brya/variants/agah/overridetree.cb | 1 + 1 file changed, 1 insertion(+) (limited to 'src/mainboard/google/brya/variants/agah/overridetree.cb') diff --git a/src/mainboard/google/brya/variants/agah/overridetree.cb b/src/mainboard/google/brya/variants/agah/overridetree.cb index fd414480d0cd..484c5f6f8a3c 100644 --- a/src/mainboard/google/brya/variants/agah/overridetree.cb +++ b/src/mainboard/google/brya/variants/agah/overridetree.cb @@ -35,6 +35,7 @@ chip soc/intel/alderlake register "typec_aux_bias_pads[2]" = "{.pad_auxp_dc = GPP_E22, .pad_auxn_dc = GPP_E23}" register "usb2_ports[1]" = "USB2_PORT_EMPTY" # Disable USB2_C1 + register "usb2_ports[2]" = "USB2_PORT_MAX_TYPE_C(OC2)" # set to Max for USB2_C2 register "usb2_ports[3]" = "USB2_PORT_EMPTY" # Disable M.2 WWAN register "usb2_ports[4]" = "USB2_PORT_EMPTY" # register "usb2_ports[6]" = "USB2_PORT_EMPTY" # -- cgit v1.2.3