From 7627e07068987dce0cfa7ff0b60a27c13e0245fe Mon Sep 17 00:00:00 2001 From: Fred Reitberger Date: Mon, 27 Jun 2022 10:26:34 -0400 Subject: mb/google/skyrim: Add SoC thermal zone The temperature values were taken from guybrush as a starting point for skyrim. BUG=b:230428864 TEST=Boot skyrim to OS and verify thermal zones are populated and working in /sys/class/thermal/ Signed-off-by: Fred Reitberger Change-Id: I6669b32f5e3dd63c6523f74166089eb4eb2d7848 Reviewed-on: https://review.coreboot.org/c/coreboot/+/65457 Tested-by: build bot (Jenkins) Reviewed-by: Raul Rangel --- src/mainboard/google/skyrim/Kconfig | 1 + .../google/skyrim/variants/baseboard/devicetree.cb | 54 ++++++++++++++++++++++ 2 files changed, 55 insertions(+) (limited to 'src/mainboard/google/skyrim') diff --git a/src/mainboard/google/skyrim/Kconfig b/src/mainboard/google/skyrim/Kconfig index 50068e78a41d..8d95f0efe786 100644 --- a/src/mainboard/google/skyrim/Kconfig +++ b/src/mainboard/google/skyrim/Kconfig @@ -17,6 +17,7 @@ config BOARD_SPECIFIC_OPTIONS select BOARD_ROMSIZE_KB_16384 select DRIVERS_GENERIC_GPIO_KEYS select DRIVERS_GENERIC_MAX98357A + select DRIVERS_ACPI_THERMAL_ZONE select DRIVERS_I2C_GENERIC select DRIVERS_I2C_HID select DRIVERS_I2C_NAU8825 diff --git a/src/mainboard/google/skyrim/variants/baseboard/devicetree.cb b/src/mainboard/google/skyrim/variants/baseboard/devicetree.cb index 3b7a6013caf9..5548d8fbe6d8 100644 --- a/src/mainboard/google/skyrim/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/skyrim/variants/baseboard/devicetree.cb @@ -157,4 +157,58 @@ chip soc/amd/sabrina device i2c 50 on end end end + + # EC is configured to power off the system at 105C, so add a two degree + # buffer so the OS can gracefully shutdown. + # + # EC is configured to assert PROCHOT at 100C. That drastically lowers + # performance. Instead we will tell the OS to start throttling the CPUs + # at 95C in hopes that we don't hit the PROCHOT limit. + # + # We set use_acpi1_thermal_zone_scope because the Chrome ec.asl + # performs a `Notify` to the `_\TZ` scope. + chip drivers/acpi/thermal_zone + register "description" = ""Charger"" + use chrome_ec as temperature_controller + register "sensor_id" = "0" + register "polling_period" = "10" + register "critical_temperature" = "103" + register "passive_config.temperature" = "95" + register "use_acpi1_thermal_zone_scope" = "true" + + device generic 0 on end + end + chip drivers/acpi/thermal_zone + register "description" = ""Memory"" + use chrome_ec as temperature_controller + register "sensor_id" = "1" + register "polling_period" = "10" + register "critical_temperature" = "103" + register "passive_config.temperature" = "95" + register "use_acpi1_thermal_zone_scope" = "true" + + device generic 1 on end + end + chip drivers/acpi/thermal_zone + register "description" = ""CPU"" + use chrome_ec as temperature_controller + register "sensor_id" = "2" + register "polling_period" = "10" + register "critical_temperature" = "103" + register "passive_config.temperature" = "95" + register "use_acpi1_thermal_zone_scope" = "true" + + device generic 2 on end + end + chip drivers/acpi/thermal_zone + register "description" = ""SOC"" + use chrome_ec as temperature_controller + register "sensor_id" = "3" + register "polling_period" = "10" + register "critical_temperature" = "103" + register "passive_config.temperature" = "95" + register "use_acpi1_thermal_zone_scope" = "true" + + device generic 3 on end + end end # chip soc/amd/sabrina -- cgit v1.2.3