From 4bcc275d717c5c2ab926bc1ee2cb7122f58928e2 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Fri, 5 Nov 2021 22:02:26 +0200 Subject: mb/google,intel: Add ChromeOS GPIOs to onboard.h MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: Ia473596e3c9a75587cd1288c8816bfef66bef82e Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/59000 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons --- src/mainboard/google/stout/chromeos.c | 5 +++-- src/mainboard/google/stout/onboard.h | 3 +++ 2 files changed, 6 insertions(+), 2 deletions(-) (limited to 'src/mainboard/google/stout') diff --git a/src/mainboard/google/stout/chromeos.c b/src/mainboard/google/stout/chromeos.c index e68093f5923f..6bbc640aeaf8 100644 --- a/src/mainboard/google/stout/chromeos.c +++ b/src/mainboard/google/stout/chromeos.c @@ -12,6 +12,7 @@ #include #include "ec.h" #include +#include "onboard.h" void fill_lb_gpios(struct lb_gpios *gpios) { @@ -35,7 +36,7 @@ void fill_lb_gpios(struct lb_gpios *gpios) int get_write_protect_state(void) { - return !get_gpio(7); + return !get_gpio(GPIO_SPI_WP); } int get_lid_switch(void) @@ -77,7 +78,7 @@ int get_recovery_mode_switch(void) static const struct cros_gpio cros_gpios[] = { CROS_GPIO_REC_AH(CROS_GPIO_VIRTUAL, CROS_GPIO_DEVICE_NAME), CROS_GPIO_REC_AH(CROS_GPIO_VIRTUAL, CROS_GPIO_DEVICE_NAME), - CROS_GPIO_WP_AL(7, CROS_GPIO_DEVICE_NAME), + CROS_GPIO_WP_AL(GPIO_SPI_WP, CROS_GPIO_DEVICE_NAME), }; void mainboard_chromeos_acpi_generate(void) diff --git a/src/mainboard/google/stout/onboard.h b/src/mainboard/google/stout/onboard.h index a31dffd4cd76..2f9b92d14bf0 100644 --- a/src/mainboard/google/stout/onboard.h +++ b/src/mainboard/google/stout/onboard.h @@ -11,4 +11,7 @@ #define XHCI_PREBOOT 0 // No PreOS boot support #define XHCI_STREAMS 1 // Sure, lets have streams +/* Write protect is active low */ +#define GPIO_SPI_WP 7 + #endif -- cgit v1.2.3