From a0d9ad322fe603d4d4cbccda9c7edcfbf0b13409 Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Mon, 3 Jan 2022 18:07:13 +0000 Subject: soc/intel/skl: Replace dt `HeciEnabled` by `HECI1 disable` config List of changes: 1. Drop `HeciEnabled` from dt and dt chip configuration. 2. Replace all logic that disables HECI1 based on the `HeciEnabled` chip config with `DISABLE_HECI1_AT_PRE_BOOT` config. 3. Make dt CSE PCI device `on` by default. 4. Mainboards set DISABLE_HECI1_AT_PRE_BOOT=y to make Heci1 function disable at pre-boot instead of the dt policy that uses `HeciEnabled = 0`. Mainboards that choose to make HECI1 enable during boot don't override `heci1 disable` config. Signed-off-by: Subrata Banik Change-Id: I5c13fe4a78be44403a81c28b1676aecc26c58607 Reviewed-on: https://review.coreboot.org/c/coreboot/+/60722 Tested-by: build bot (Jenkins) Reviewed-by: Tim Wawrzynczak --- src/mainboard/hp/280_g2/Kconfig | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src/mainboard/hp/280_g2/Kconfig') diff --git a/src/mainboard/hp/280_g2/Kconfig b/src/mainboard/hp/280_g2/Kconfig index df3f626e9f04..0db753d2cf45 100644 --- a/src/mainboard/hp/280_g2/Kconfig +++ b/src/mainboard/hp/280_g2/Kconfig @@ -16,6 +16,9 @@ config BOARD_SPECIFIC_OPTIONS select SPD_READ_BY_WORD select SUPERIO_ITE_COMMON_PRE_RAM +config DISABLE_HECI1_AT_PRE_BOOT + default y + config MAINBOARD_DIR default "hp/280_g2" -- cgit v1.2.3